mgorny marked 5 inline comments as done.
mgorny added inline comments.
================
Comment at:
lldb/source/Plugins/Process/Utility/NativeRegisterContextBreakWatchpoint_arm64.cpp:248
+ // non 8-byte aligned addresses as well.
+ if (addr & 0x07) {
+ uint8_t watch_mask = (addr & 0x07) + size;
----------------
That's something to consider for a followup work but I'm thinking that instead
of changing `size` here we could set bit-mask appropriately to watch only the
exact bytes we need. If I read the manual correctly
(https://developer.arm.com/documentation/ddi0595/2020-12/AArch64-Registers/DBGWCR-n--EL1--Debug-Watchpoint-Control-Registers?lang=en#fieldset_0-12_5),
this should be doable.
e.g. if `addr = 0x2002` and `size = 2` ,
we currently set `addr = 0x2000` and `size = 4` and therefore watch
`0x2000`..`0x2003`
but we could instead set BAS to `0b00001100` to watch `0x2002`..`0x2003`.
Am I grasping this correctly?
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D96548/new/
https://reviews.llvm.org/D96548
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