[Lldb-commits] [lldb] [llvm] Add RISC-V CPU type and CPU subtype to llvm & lldb (PR #136785)

[Jonas Devlieghere via lldb-commits]

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@@ -353,6 +353,8 @@ static const ArchDefinitionEntry g_macho_arch_entries[] = {
     {ArchSpec::eCore_x86_64_x86_64,   llvm::MachO::CPU_TYPE_X86_64,     
llvm::MachO::CPU_SUBTYPE_X86_ARCH1,     UINT32_MAX, SUBTYPE_MASK},
     {ArchSpec::eCore_x86_64_x86_64h,  llvm::MachO::CPU_TYPE_X86_64,     
llvm::MachO::CPU_SUBTYPE_X86_64_H,      UINT32_MAX, SUBTYPE_MASK},
     {ArchSpec::eCore_x86_64_x86_64,   llvm::MachO::CPU_TYPE_X86_64,     
CPU_ANY, UINT32_MAX, UINT32_MAX},
+    {ArchSpec::eCore_riscv32,         llvm::MachO::CPU_TYPE_RISCV,      
llvm::MachO::CPU_SUBTYPE_RISCV_ALL,     UINT32_MAX, SUBTYPE_MASK},
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JDevlieghere wrote:

That's not quite accurate. It doesn't apply to both, it _is_ riscv32. 

https://github.com/llvm/llvm-project/pull/136785
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