https://github.com/JDevlieghere created https://github.com/llvm/llvm-project/pull/136785
Add the enum values for RISC-V CPU type and CPU subtype to llvm and use in LLDB's ArchSpec. >From bb749849d514a02a3a418e87510a9d0cd0ebe8cc Mon Sep 17 00:00:00 2001 From: Jonas Devlieghere <jo...@devlieghere.com> Date: Tue, 22 Apr 2025 16:21:25 -0700 Subject: [PATCH] Add RISC-V CPU type and CPU subtype to llvm & lldb Add the enum values for RISC-V CPU type and CPU subtype to llvm and use in LLDB's ArchSpec. --- lldb/source/Utility/ArchSpec.cpp | 2 ++ lldb/unittests/Utility/ArchSpecTest.cpp | 8 ++++++++ llvm/include/llvm/BinaryFormat/MachO.h | 8 +++++++- 3 files changed, 17 insertions(+), 1 deletion(-) diff --git a/lldb/source/Utility/ArchSpec.cpp b/lldb/source/Utility/ArchSpec.cpp index 495215459336a..2e6c6a6ffcbe4 100644 --- a/lldb/source/Utility/ArchSpec.cpp +++ b/lldb/source/Utility/ArchSpec.cpp @@ -353,6 +353,8 @@ static const ArchDefinitionEntry g_macho_arch_entries[] = { {ArchSpec::eCore_x86_64_x86_64, llvm::MachO::CPU_TYPE_X86_64, llvm::MachO::CPU_SUBTYPE_X86_ARCH1, UINT32_MAX, SUBTYPE_MASK}, {ArchSpec::eCore_x86_64_x86_64h, llvm::MachO::CPU_TYPE_X86_64, llvm::MachO::CPU_SUBTYPE_X86_64_H, UINT32_MAX, SUBTYPE_MASK}, {ArchSpec::eCore_x86_64_x86_64, llvm::MachO::CPU_TYPE_X86_64, CPU_ANY, UINT32_MAX, UINT32_MAX}, + {ArchSpec::eCore_riscv32, llvm::MachO::CPU_TYPE_RISCV, llvm::MachO::CPU_SUBTYPE_RISCV_ALL, UINT32_MAX, SUBTYPE_MASK}, + {ArchSpec::eCore_riscv32, llvm::MachO::CPU_TYPE_RISCV, CPU_ANY, UINT32_MAX, SUBTYPE_MASK}, // Catch any unknown mach architectures so we can always use the object and symbol mach-o files {ArchSpec::eCore_uknownMach32, 0, 0, 0xFF000000u, 0x00000000u}, {ArchSpec::eCore_uknownMach64, llvm::MachO::CPU_ARCH_ABI64, 0, 0xFF000000u, 0x00000000u}}; diff --git a/lldb/unittests/Utility/ArchSpecTest.cpp b/lldb/unittests/Utility/ArchSpecTest.cpp index 2c78629849c64..3bf1c3f81876f 100644 --- a/lldb/unittests/Utility/ArchSpecTest.cpp +++ b/lldb/unittests/Utility/ArchSpecTest.cpp @@ -113,6 +113,14 @@ TEST(ArchSpecTest, TestSetTriple) { .consume_front("powerpc-apple-darwin")); EXPECT_EQ(ArchSpec::eCore_ppc_ppc970, AS.GetCore()); + AS = ArchSpec(); + EXPECT_TRUE(AS.SetTriple("24-0-apple-unknown")); + EXPECT_EQ(uint32_t(llvm::MachO::CPU_TYPE_RISCV), AS.GetMachOCPUType()); + EXPECT_EQ(0u, AS.GetMachOCPUSubType()); + EXPECT_TRUE(llvm::StringRef(AS.GetTriple().str()) + .consume_front("riscv32-apple-unknown")); + EXPECT_EQ(ArchSpec::eCore_riscv32, AS.GetCore()); + AS = ArchSpec(); EXPECT_TRUE(AS.SetTriple("i686-pc-windows")); EXPECT_EQ(llvm::Triple::x86, AS.GetTriple().getArch()); diff --git a/llvm/include/llvm/BinaryFormat/MachO.h b/llvm/include/llvm/BinaryFormat/MachO.h index 83aaf19c71e50..5afe70bffc24b 100644 --- a/llvm/include/llvm/BinaryFormat/MachO.h +++ b/llvm/include/llvm/BinaryFormat/MachO.h @@ -1571,7 +1571,9 @@ enum CPUType { CPU_TYPE_ARM64_32 = CPU_TYPE_ARM | CPU_ARCH_ABI64_32, CPU_TYPE_SPARC = 14, CPU_TYPE_POWERPC = 18, - CPU_TYPE_POWERPC64 = CPU_TYPE_POWERPC | CPU_ARCH_ABI64 + CPU_TYPE_POWERPC64 = CPU_TYPE_POWERPC | CPU_ARCH_ABI64, + + CPU_TYPE_RISCV = 24, }; enum : uint32_t { @@ -1698,6 +1700,10 @@ enum CPUSubTypePowerPC { CPU_SUBTYPE_MC98601 = CPU_SUBTYPE_POWERPC_601 }; +enum CPUSubTypeRISCV { + CPU_SUBTYPE_RISCV_ALL = 0, +}; + Expected<uint32_t> getCPUType(const Triple &T); Expected<uint32_t> getCPUSubType(const Triple &T); Expected<uint32_t> getCPUSubType(const Triple &T, unsigned PtrAuthABIVersion, _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits