On 25-10-21 20:08:54, Luca Weiss wrote:
> The 'Agera' PLLs (with clk_agera_pll_configure) do not take some of the
> parameters that are provided in the vendor driver. Instead the upstream
> configuration should provide the final user_ctl value that is written to
> the USER_CTL register.
>
> Fix the config so that the PLL is configured correctly, and fixes
> CAMCC_MCLK* being stuck off.
>
> Fixes: 80f5451d9a7c ("clk: qcom: Add camera clock controller driver for
> SM6350")
> Suggested-by: Taniya Das <[email protected]>
> Signed-off-by: Luca Weiss <[email protected]>
Reviewed-by: Abel Vesa <[email protected]>
