Enable DC Balance from vrr compute config and related hw flag.
Signed-off-by: Mitul Golani <[email protected]>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c
b/drivers/gpu/drm/i915/display/intel_vrr.c
index d5359a96054b..e48a795a8c18 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -277,6 +277,9 @@ void intel_vrr_compute_vrr_timings(struct intel_crtc_state
*crtc_state)
{
crtc_state->vrr.enable = true;
crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
+
+ if (intel_vrr_dc_balance_possible(crtc_state))
+ crtc_state->vrr.dc_balance.enable = true;
}
/*
@@ -686,6 +689,7 @@ void intel_vrr_enable(const struct intel_crtc_state
*crtc_state)
ctl |= VRR_CTL_CMRR_ENABLE;
if (crtc_state->vrr.dc_balance.enable) {
+ ctl |= VRR_CTL_DCB_ADJ_ENABLE;
intel_de_write(display,
TRANS_ADAPTIVE_SYNC_DCB_CTL(cpu_transcoder),
ADAPTIVE_SYNC_COUNTER_EN);
intel_dmc_configure_dc_balance_ctl_regs(display, pipe, true);
--
2.48.1
