> -----Original Message-----
> From: Borah, Chaitanya Kumar <[email protected]>
> Sent: Tuesday, April 8, 2025 4:30 PM
> To: [email protected]; [email protected]
> Cc: [email protected]; Shankar, Uma <[email protected]>;
> Borah, Chaitanya Kumar <[email protected]>; Manna, Animesh
> <[email protected]>
> Subject: [PATCH v2 06/11] drm/i915/dsb: Add support for GOSUB interrupt
>
> DSB raises an interrupt when there is a nested GOSUB command or illegal
> Head/Tail. Add support to log such errors in the DSB interrupt handler.
>
> v2: Enable support only in platforms that support this (Ville)
Looks Good to me.
Reviewed-by: Uma Shankar <[email protected]>
> Signed-off-by: Chaitanya Kumar Borah <[email protected]>
> ---
> drivers/gpu/drm/i915/display/intel_dsb.c | 9 +++++++++
> drivers/gpu/drm/i915/display/intel_dsb_regs.h | 2 ++
> 2 files changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
> b/drivers/gpu/drm/i915/display/intel_dsb.c
> index 97ea3c655590..5ddc3e340a79 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> @@ -634,6 +634,9 @@ static u32 dsb_error_int_status(struct intel_display
> *display)
> if (DISPLAY_VER(display) >= 14)
> errors |= DSB_ATS_FAULT_INT_STATUS;
>
> + if (DISPLAY_VER(display) >= 30)
> + errors |= DSB_GOSUB_INT_STATUS;
> +
> return errors;
> }
>
> @@ -648,6 +651,9 @@ static u32 dsb_error_int_en(struct intel_display *display)
> if (DISPLAY_VER(display) >= 14)
> errors |= DSB_ATS_FAULT_INT_EN;
>
> + if (DISPLAY_VER(display) >= 30)
> + errors |= DSB_GOSUB_INT_EN;
> +
> return errors;
> }
>
> @@ -986,4 +992,7 @@ void intel_dsb_irq_handler(struct intel_display *display,
> if (errors & DSB_POLL_ERR_INT_STATUS)
> drm_err(display->drm, "[CRTC:%d:%s] DSB %d poll error\n",
> crtc->base.base.id, crtc->base.name, dsb_id);
> + if (errors & DSB_GOSUB_INT_STATUS)
> + drm_err(display->drm, "[CRTC:%d:%s] DSB %d GOSUB
> programming error\n",
> + crtc->base.base.id, crtc->base.name, dsb_id);
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb_regs.h
> b/drivers/gpu/drm/i915/display/intel_dsb_regs.h
> index cb6e0e5624a6..230104f36145 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_dsb_regs.h
> @@ -51,11 +51,13 @@
> #define DSB_RESET_SM_STATE_MASK REG_GENMASK(5, 4)
> #define DSB_RUN_SM_STATE_MASK REG_GENMASK(2, 0)
> #define DSB_INTERRUPT(pipe, id) _MMIO(DSBSL_INSTANCE(pipe,
> id) + 0x28)
> +#define DSB_GOSUB_INT_EN REG_BIT(21) /* ptl+ */
> #define DSB_ATS_FAULT_INT_EN REG_BIT(20) /* mtl+ */
> #define DSB_GTT_FAULT_INT_EN REG_BIT(19)
> #define DSB_RSPTIMEOUT_INT_EN REG_BIT(18)
> #define DSB_POLL_ERR_INT_EN REG_BIT(17)
> #define DSB_PROG_INT_EN REG_BIT(16)
> +#define DSB_GOSUB_INT_STATUS REG_BIT(5) /* ptl+ */
> #define DSB_ATS_FAULT_INT_STATUS REG_BIT(4) /* mtl+ */
> #define DSB_GTT_FAULT_INT_STATUS REG_BIT(3)
> #define DSB_RSPTIMEOUT_INT_STATUS REG_BIT(2)
> --
> 2.25.1
