Paul Tan wrote: > Is it necessary that Gschem and/or Gnetlist > C/SCM has to changed to accomodates your way > of implementation? (except the visual BUS part) . . .
> From: Steve Meier <[email protected]> . . . > 2) I am able to re-netname (this is a new verb) a bus at a bus to > symbol interface or a bus to bus ripper interface (my bus rippers can be > either bus to net or bus to bus) as long as I keep the same names. This > means that by symbols don't have to be forced to a standard. Steve is adding something new here it seems, so change is probably needed to get it.. I get a vision of top level netnames overriding, so the bus to pins connections of sub modules are all that determines the netlist. Renaming is the thing that is new and not done before as far as I can see. I"m interested to hear more about the re-netnaming concept. With chip design style netnaming, you can use a wires only module to rearrange and change names. Starting with a bus called add-io-data<0:28>, you can plug it into a module that does nothing but rename and has straight through wires, maybe with different groupings. Then the outputs have new names. The top level names in the hierarchy are still going to be part of the netlist, so you could use them as the netnames. A bus ripper sounds like a wires only module to me. Am I warm? John Griessen -- Ecosensory Austin TX _______________________________________________ geda-dev mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-dev
