On Thu, 2009-01-08 at 10:52 -0500, DJ Delorie wrote: > > Anybody else!?!? > > I'm willing, but I've already got the LF work to do. My pet projects > for GSoC'09: > > * "bus nets" in gaf - the ability to use pin numbers like > "[1-4,6,8,10-15]" and net names like "D[0-15]" and have them > demultiplex into individual signals when you run the netlister.
libgeda + gschem now support bus pins (graphical only) - new this development cycle. I just crippled gnetlist to avoid it helpfully netlisting them into the standard netlist as if they were nets, and taught it some better type-checking rules between the various objects. I did this to stop the "buses as nets" miss-feature being used by anyone. We don't want to encourage any usage we may intend to break later! It is a 2-line edit to turn on netlisting of buses, but it may be rather more complex to ensure that in every appropriate place which reads the pin/connectivity list, the code checks to see if its looking at a net-pin or a bus-pin connectivity list. For the 1.8 cycle, I was thinking we might expose connectivity of buses to backend APIs, and introduce a shared scheme file which some possible ways of interpreting attributes defining the bus, then spitting a flattened bus into the resulting net-list. Teaching PCB to grok buses natively would be really cool. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) _______________________________________________ geda-dev mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-dev
