On 8/22/07, tbp <[EMAIL PROTECTED]> wrote: > On 8/22/07, Paolo Bonzini <[EMAIL PROTECTED]> wrote: > > I think you're running too far with your sarcasm. SSE's instructions do > > not go so far as to specify integer vs. floating point. To me, "ps" > > means "32-bit SIMD", independent of integerness. > Excuse me if i'm amazed being replied bitwise ops on floating values > make no sense as the justification for breaking something that used to > work and match hardware features. I naively thought that was the > purpose of that convenient extension.
Which hardware (remember GCC is a generic compiler)? VMX/Altivec and SPU actually does not have different instructions for bitwise and/ior/xor for different vector types (it is all the same instruction). I have ran into ICEs with even bitwise on vector float/double on x86 also in the past which is the other reason why I disabled them. Since this is an extension, it would be nice if it was nicely defined extension which means disabling them for vector float/double. Thanks, Andrew Pinski
