Apparently enough for a small vendor like Intel to propose such things
as orps, andps, andnps, and xorps.
I think you're running too far with your sarcasm. SSE's instructions do
not go so far as to specify integer vs. floating point. To me, "ps"
means "32-bit SIMD", independent of integerness.
So, that's what i feared... it was intentional. And now i guess the only
sanctioned access to those ops is via builtins/intrinsics.
No, you can do so with casts. Floating-point to integer vector casts
preserve the bit pattern. For example, you can do
vector float f = { 5, 5, 5, 5 };
vector int g = { 0x80000000, 0, 0x80000000, 0 };
vector int f_int = (vector int) f;
f = (vector float) (f_int ^ g);
For Altivec, I get exactly
addis r2,r10,ha16(LC0-"gibberish")
la r2,lo16(LC0-"gibberish")(r2)
lvx v0,0,r2
vxor v2,v2,v0
...
LC0:
.long -2147483648
.long 0
.long -2147483648
.long 0
Paolo
