> -----Original Message-----
> From: Claudio Bantaloukas <[email protected]>
> Sent: 18 December 2025 17:15
> To: Gcc Patches ML <[email protected]>
> Cc: Alex Coplan <[email protected]>; Alice Carlotti
> <[email protected]>; Andrew Pinski
> <[email protected]>; Kyrylo Tkachov
> <[email protected]>; Richard Earnshaw <[email protected]>;
> Tamar Christina <[email protected]>; Wilco Dijkstra
> <[email protected]>; Claudio Bantaloukas
> <[email protected]>
> Subject: [PATCH v5 6/9] aarch64: add basic support for sme-f8f16 and sme-
> f8f32
> 
> This patch adds support for the SME_F8F16 and SME_F8F32 features as
> architecture
> options, along with related definitions. This support is required for 
> subsequent
> intrinsics to work.

OK.

Thanks,
Tamar

> 
> gcc/
>       * config/aarch64/aarch64.h:
>       (TARGET_STREAMING_SME_F8F16,
> TARGET_STREAMING_SME_F8F32): Add defines.
>       * config/aarch64/aarch64-c.cc:
>       (__ARM_FEATURE_SME_F8F16, __ARM_FEATURE_SME_F8F32): Add
> defines.
>       * config/aarch64/aarch64-option-extensions.def:
>       (sme-f8f16, sme-f8f32): Add arch options in command line.
>       * config/aarch64/aarch64-sve-builtins-functions.h:
>       (sme_2mode_function_t): Pass unspec_for_mfp8 parameter through
> ctor.
>       * config/aarch64/aarch64-sve-builtins-sme.def:
>       (DEF_SME_FUNCTION_GS, DEF_SME_FUNCTION): Redefine based on
>       DEF_SME_FUNCTION_GS_FPM.
>       (DEF_SME_ZA_FUNCTION_GS, DEF_SME_ZA_FUNCTION): Redefine
> based on
>       DEF_SME_ZA_FUNCTION_GS_FPM.
>       (AARCH64_FL_SME_F8F16, AARCH64_FL_SME_F8F32): Add new
>       REQUIRED_EXTENSIONS sections.
>       * config/aarch64/aarch64-sve-builtins.cc:
>       (TYPES_za_h_mf8): Add new types.
>       (TYPES_za_s_mf8): Likewise.
>       (sme_function_groups): Define using DEF_SME_FUNCTION_GS_FPM
> instead of
>       DEF_SME_FUNCTION_GS.
>       * doc/invoke.texi: (sme-f8f16, sme-f8f32): Add documentation of
> option.
> 
> gcc/testsuite/
>       * gcc.target/aarch64/pragma_cpp_predefs_4.c: Add tests checking
> that
>       sme-f8f16 and sme-f8f32 prefefs are off by default, and checks for
>       feature dependencies.
>       * lib/target-supports.exp: Add check_effective_target support for
>       sme-f8f16 and sme-f8f32.
> ---
>  gcc/config/aarch64/aarch64-c.cc               |  4 +++
>  .../aarch64/aarch64-option-extensions.def     |  4 +++
>  .../aarch64/aarch64-sve-builtins-functions.h  |  5 +--
>  .../aarch64/aarch64-sve-builtins-sme.def      | 18 ++++++++--
>  gcc/config/aarch64/aarch64-sve-builtins.cc    | 18 +++++++---
>  gcc/config/aarch64/aarch64.h                  |  8 +++++
>  gcc/doc/invoke.texi                           |  6 ++++
>  .../gcc.target/aarch64/pragma_cpp_predefs_4.c | 34
> +++++++++++++++++++
>  gcc/testsuite/lib/target-supports.exp         |  1 +
>  9 files changed, 89 insertions(+), 9 deletions(-)
> 
> diff --git a/gcc/config/aarch64/aarch64-c.cc b/gcc/config/aarch64/aarch64-
> c.cc
> index 04cd7c354e5..dcfc14ae998 100644
> --- a/gcc/config/aarch64/aarch64-c.cc
> +++ b/gcc/config/aarch64/aarch64-c.cc
> @@ -294,6 +294,10 @@ aarch64_update_cpp_builtins (cpp_reader *pfile)
> 
>    aarch64_def_or_undef (TARGET_SME, "__ARM_FEATURE_SME", pfile);
>    aarch64_def_or_undef (TARGET_SME_I16I64,
> "__ARM_FEATURE_SME_I16I64", pfile);
> +  aarch64_def_or_undef (AARCH64_HAVE_ISA (SME_F8F16),
> +                     "__ARM_FEATURE_SME_F8F16", pfile);
> +  aarch64_def_or_undef (AARCH64_HAVE_ISA (SME_F8F32),
> +                     "__ARM_FEATURE_SME_F8F32", pfile);
>    aarch64_def_or_undef (AARCH64_HAVE_ISA (SME_B16B16),
>                       "__ARM_FEATURE_SME_B16B16", pfile);
>    aarch64_def_or_undef (AARCH64_HAVE_ISA (SME_F16F16),
> diff --git a/gcc/config/aarch64/aarch64-option-extensions.def
> b/gcc/config/aarch64/aarch64-option-extensions.def
> index c43802eb715..c8121baa3fd 100644
> --- a/gcc/config/aarch64/aarch64-option-extensions.def
> +++ b/gcc/config/aarch64/aarch64-option-extensions.def
> @@ -308,6 +308,10 @@ AARCH64_OPT_EXTENSION("lut", LUT, (SIMD), (),
> (), "lut")
> 
>  AARCH64_OPT_EXTENSION ("sme-lutv2", SME_LUTv2, (SME2), (), (),
> "smelutv2")
> 
> +AARCH64_OPT_EXTENSION ("sme-f8f16", SME_F8F16, (SME2, FP8), (), (),
> "smef8f16")
> +
> +AARCH64_OPT_EXTENSION ("sme-f8f32", SME_F8F32, (SME2, FP8), (), (),
> "smef8f32")
> +
>  AARCH64_OPT_EXTENSION("cpa", CPA, (), (), (), "")
> 
>  AARCH64_OPT_EXTENSION("fprcvt", FPRCVT, (FP), (), (), "fprcvt")
> diff --git a/gcc/config/aarch64/aarch64-sve-builtins-functions.h
> b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
> index c05946d4ec7..f5cf6bfb899 100644
> --- a/gcc/config/aarch64/aarch64-sve-builtins-functions.h
> +++ b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
> @@ -462,8 +462,9 @@ public:
>    using parent = read_write_za<unspec_based_function_base>;
> 
>    CONSTEXPR sme_2mode_function_t (int unspec_for_sint, int
> unspec_for_uint,
> -                               int unspec_for_fp)
> -    : parent (unspec_for_sint, unspec_for_uint, unspec_for_fp, -1, 1)
> +                               int unspec_for_fp, int unspec_for_mfp8 = -1)
> +    : parent (unspec_for_sint, unspec_for_uint, unspec_for_fp,
> unspec_for_mfp8,
> +           1)
>    {}
> 
>    rtx
> diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sme.def
> b/gcc/config/aarch64/aarch64-sve-builtins-sme.def
> index 978a74f438d..c86d5fa730b 100644
> --- a/gcc/config/aarch64/aarch64-sve-builtins-sme.def
> +++ b/gcc/config/aarch64/aarch64-sve-builtins-sme.def
> @@ -17,19 +17,25 @@
>     along with GCC; see the file COPYING3.  If not see
>     <http://www.gnu.org/licenses/>.  */
> 
> +
> +#ifndef DEF_SME_FUNCTION_GS
> +#define DEF_SME_FUNCTION_GS(NAME, SHAPE, TYPES, GROUPS, PREDS) \
> +  DEF_SME_FUNCTION_GS_FPM (NAME, SHAPE, TYPES, GROUPS, PREDS,
> unused)
> +#endif
> +
>  #ifndef DEF_SME_FUNCTION
>  #define DEF_SME_FUNCTION(NAME, SHAPE, TYPES, PREDS) \
> -  DEF_SME_FUNCTION_GS (NAME, SHAPE, TYPES, none, PREDS)
> +  DEF_SME_FUNCTION_GS_FPM (NAME, SHAPE, TYPES, none, PREDS,
> unused)
>  #endif
> 
>  #ifndef DEF_SME_ZA_FUNCTION_GS
>  #define DEF_SME_ZA_FUNCTION_GS(NAME, SHAPE, TYPES, GROUP, PREDS)
> \
> -  DEF_SME_FUNCTION_GS (NAME, SHAPE, TYPES, GROUP, PREDS)
> +  DEF_SME_ZA_FUNCTION_GS_FPM (NAME, SHAPE, TYPES, GROUP, PREDS,
> unused)
>  #endif
> 
>  #ifndef DEF_SME_ZA_FUNCTION
>  #define DEF_SME_ZA_FUNCTION(NAME, SHAPE, TYPES, PREDS) \
> -  DEF_SME_ZA_FUNCTION_GS (NAME, SHAPE, TYPES, none, PREDS)
> +  DEF_SME_ZA_FUNCTION_GS_FPM (NAME, SHAPE, TYPES, none, PREDS,
> unused)
>  #endif
> 
>  #define REQUIRED_EXTENSIONS streaming_compatible (0)
> @@ -259,6 +265,12 @@ DEF_SME_FUNCTION_GS (svwrite_lane_zt,
> write_lane_zt, all_data,  none, none)
>  DEF_SME_FUNCTION_GS (svluti4_zt,      luti4_zt,      b_integer, x4,   none)
>  #undef REQUIRED_EXTENSIONS
> 
> +#define REQUIRED_EXTENSIONS streaming_only (AARCH64_FL_SME_F8F16)
> +#undef REQUIRED_EXTENSIONS
> +
> +#define REQUIRED_EXTENSIONS streaming_only (AARCH64_FL_SME_F8F32)
> +#undef REQUIRED_EXTENSIONS
> +
>  #undef DEF_SME_ZA_FUNCTION
>  #undef DEF_SME_ZA_FUNCTION_GS
>  #undef DEF_SME_FUNCTION
> diff --git a/gcc/config/aarch64/aarch64-sve-builtins.cc
> b/gcc/config/aarch64/aarch64-sve-builtins.cc
> index 03481ee4a77..505a2445d1f 100644
> --- a/gcc/config/aarch64/aarch64-sve-builtins.cc
> +++ b/gcc/config/aarch64/aarch64-sve-builtins.cc
> @@ -664,6 +664,10 @@ CONSTEXPR const group_suffix_info
> group_suffixes[] = {
>    TYPES_za_bhsd_data (S, D), \
>    TYPES_reinterpret1 (D, za128)
> 
> +/* _za16_mf8.  */
> +#define TYPES_za_h_mf8(S, D) \
> +  D (za16, mf8)
> +
>  /* _za16_bf16.  */
>  #define TYPES_za_h_bfloat(S, D) \
>    D (za16, bf16)
> @@ -700,6 +704,10 @@ CONSTEXPR const group_suffix_info
> group_suffixes[] = {
>  #define TYPES_za_s_integer(S, D) \
>    D (za32, s32), D (za32, u32)
> 
> +/* _za32_mf8.  */
> +#define TYPES_za_s_mf8(S, D) \
> +  D (za32, mf8)
> +
>  /* _za32_f32.  */
>  #define TYPES_za_s_float(S, D) \
>    D (za32, f32)
> @@ -849,6 +857,7 @@ DEF_SVE_TYPES_ARRAY (all_za);
>  DEF_SVE_TYPES_ARRAY (d_za);
>  DEF_SVE_TYPES_ARRAY (za_bhsd_data);
>  DEF_SVE_TYPES_ARRAY (za_all_data);
> +DEF_SVE_TYPES_ARRAY (za_h_mf8);
>  DEF_SVE_TYPES_ARRAY (za_h_bfloat);
>  DEF_SVE_TYPES_ARRAY (za_h_float);
>  DEF_SVE_TYPES_ARRAY (za_s_b_signed);
> @@ -858,6 +867,7 @@ DEF_SVE_TYPES_ARRAY (za_s_h_integer);
>  DEF_SVE_TYPES_ARRAY (za_s_h_data);
>  DEF_SVE_TYPES_ARRAY (za_s_unsigned);
>  DEF_SVE_TYPES_ARRAY (za_s_integer);
> +DEF_SVE_TYPES_ARRAY (za_s_mf8);
>  DEF_SVE_TYPES_ARRAY (za_s_float);
>  DEF_SVE_TYPES_ARRAY (za_s_data);
>  DEF_SVE_TYPES_ARRAY (za_d_h_integer);
> @@ -987,15 +997,15 @@ static CONSTEXPR const function_group_info
> neon_sve_function_groups[] = {
> 
>  /* A list of all arm_sme.h functions.  */
>  static CONSTEXPR const function_group_info sme_function_groups[] = {
> -#define DEF_SME_FUNCTION_GS(NAME, SHAPE, TYPES, GROUPS, PREDS) \
> +#define DEF_SME_FUNCTION_GS_FPM(NAME, SHAPE, TYPES, GROUPS,
> PREDS, FPM_MODE) \
>    { #NAME, &functions::NAME, &shapes::SHAPE, types_##TYPES,
> groups_##GROUPS, \
>      preds_##PREDS, aarch64_required_extensions::REQUIRED_EXTENSIONS, \
> -    FPM_unused },
> -#define DEF_SME_ZA_FUNCTION_GS(NAME, SHAPE, TYPES, GROUPS,
> PREDS) \
> +    FPM_##FPM_MODE },
> +#define DEF_SME_ZA_FUNCTION_GS_FPM(NAME, SHAPE, TYPES, GROUPS,
> PREDS, FPM_MODE) \
>    { #NAME, &functions::NAME##_za, &shapes::SHAPE, types_##TYPES, \
>      groups_##GROUPS, preds_##PREDS, \
>      aarch64_required_extensions::REQUIRED_EXTENSIONS \
> -      .and_also (AARCH64_FL_ZA_ON), FPM_unused },
> +      .and_also (AARCH64_FL_ZA_ON), FPM_##FPM_MODE },
>  #include "aarch64-sve-builtins-sme.def"
>  };
> 
> diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
> index e3eb807fb53..deab503d746 100644
> --- a/gcc/config/aarch64/aarch64.h
> +++ b/gcc/config/aarch64/aarch64.h
> @@ -321,6 +321,14 @@ constexpr auto AARCH64_FL_DEFAULT_ISA_MODE
> ATTRIBUTE_UNUSED
>  /* The FEAT_SME_I16I64 extension to SME, enabled through +sme-i16i64.  */
>  #define TARGET_SME_I16I64 AARCH64_HAVE_ISA (SME_I16I64)
> 
> +/* The FEAT_SME_F8F16 extension to SME, enabled through +sme-f8f16.  */
> +#define TARGET_STREAMING_SME_F8F16 \
> +  (AARCH64_HAVE_ISA (SME_F8F16) && TARGET_STREAMING)
> +
> +/* The FEAT_SME_F8F32 extension to SME, enabled through +sme-f8f32.  */
> +#define TARGET_STREAMING_SME_F8F32 \
> +  (AARCH64_HAVE_ISA (SME_F8F32) && TARGET_STREAMING)
> +
>  /* The FEAT_SME_B16B16 extension to SME, enabled through +sme-b16b16.
> */
>  #define TARGET_STREAMING_SME_B16B16 \
>    (AARCH64_HAVE_ISA (SME_B16B16) && TARGET_STREAMING)
> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> index c54eb758b17..0252740175d 100644
> --- a/gcc/doc/invoke.texi
> +++ b/gcc/doc/invoke.texi
> @@ -23079,6 +23079,12 @@ Enable the FEAT_SME_F64F64 extension to
> SME.  This also enables SME
>  instructions.
>  @item sme2
>  Enable the Scalable Matrix Extension 2.  This also enables SME instructions.
> +@item sme-f8f16
> +Enable the FEAT_SME_F8F16 extension to SME.  This also enables SME2 and
> FP8
> +instructions.
> +@item sme-f8f32
> +Enable the FEAT_SME_F8F32 extension to SME.  This also enables SME2 and
> FP8
> +instructions.
>  @item sme-b16b16
>  Enable the FEAT_SME_B16B16 extension to SME.  This also enables SME2
>  and SVE_B16B16 instructions.
> diff --git a/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c
> b/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c
> index 3799fb46df1..284c2a23252 100644
> --- a/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c
> +++ b/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c
> @@ -70,6 +70,12 @@
>  #ifdef __ARM_FEATURE_SME_I16I64
>  #error Foo
>  #endif
> +#ifdef __ARM_FEATURE_SME_F8F16
> +#error Foo
> +#endif
> +#ifdef __ARM_FEATURE_SME_F8F32
> +#error Foo
> +#endif
>  #ifdef __ARM_FEATURE_SME_B16B16
>  #error Foo
>  #endif
> @@ -105,6 +111,34 @@
>  #error Foo
>  #endif
> 
> +#pragma GCC target "+nothing+sve2+sme-f8f16"
> +#ifndef __ARM_FEATURE_SME_F8F16
> +#error Foo
> +#endif
> +#ifndef __ARM_FEATURE_SME
> +#error Foo
> +#endif
> +#ifndef __ARM_FEATURE_SME2
> +#error Foo
> +#endif
> +#ifndef __ARM_FEATURE_FP8
> +#error Foo
> +#endif
> +
> +#pragma GCC target "+nothing+sve2+sme-f8f32"
> +#ifndef __ARM_FEATURE_SME_F8F32
> +#error Foo
> +#endif
> +#ifndef __ARM_FEATURE_SME
> +#error Foo
> +#endif
> +#ifndef __ARM_FEATURE_SME2
> +#error Foo
> +#endif
> +#ifndef __ARM_FEATURE_FP8
> +#error Foo
> +#endif
> +
>  #pragma GCC target "+nothing+sve2+sme-f16f16"
>  #ifndef __ARM_FEATURE_SME_F16F16
>  #error Foo
> diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-
> supports.exp
> index 27759094d85..2946db06058 100644
> --- a/gcc/testsuite/lib/target-supports.exp
> +++ b/gcc/testsuite/lib/target-supports.exp
> @@ -12652,6 +12652,7 @@ set exts {
>  # We don't support SME without SVE2, so we'll use armv9 as the base
>  # archiecture for SME and the features that require it.
>  set exts_sve2 {
> +    "sme-f8f16" "sme-f8f32"
>      "sme-b16b16" "sme-f16f16" "sme-i16i64" "sme" "sme2" "sme2p1"
>      "ssve-fp8dot2" "ssve-fp8dot4" "ssve-fp8fma"
>  }
> --
> 2.51.0

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