gcc/testsuite/ChangeLog:
* gcc.target/loongarch/abd-lsx.c: Add loongarch_sx condition.
* gcc.target/loongarch/avg-ceil-lasx.c: Likewise. Likewise.
* gcc.target/loongarch/avg-ceil-lsx.c: Likewise.
* gcc.target/loongarch/avg-floor-lasx.c: Likewise.
* gcc.target/loongarch/avg-floor-lsx.c: Likewise.
* gcc.target/loongarch/lasx-andn-iorn.c: Likewise.
* gcc.target/loongarch/lasx-extract-even_odd-opt.c: Likewise.
* gcc.target/loongarch/lasx-func-attr-2.c: Likewise.
* gcc.target/loongarch/lasx-pragma-attr-2.c: Likewise.
* gcc.target/loongarch/lsx-andn-iorn.c: Likewise.
* gcc.target/loongarch/lsx-func-attr-2.c: Likewise.
* gcc.target/loongarch/lsx-pragma-attr-2.c: Likewise.
* gcc.target/loongarch/mov-zero-1.c: Likewise.
* gcc.target/loongarch/popcnt.c: Likewise.
* gcc.target/loongarch/popcount.c: Likewise.
* gcc.target/loongarch/pr112476-1.c: Likewise.
* gcc.target/loongarch/pr112476-2.c: Likewise.
* gcc.target/loongarch/pr112476-3.c: Likewise.
* gcc.target/loongarch/pr112476-4.c: Likewise.
* gcc.target/loongarch/pr113033.c: Likewise.
* gcc.target/loongarch/pragma-push-pop.c: Likewise.
* gcc.target/loongarch/rotl-with-vrotr-b.c: Likewise.
* gcc.target/loongarch/rotl-with-vrotr-d.c: Likewise.
* gcc.target/loongarch/rotl-with-vrotr-h.c: Likewise.
* gcc.target/loongarch/rotl-with-vrotr-w.c: Likewise.
* gcc.target/loongarch/rotl-with-xvrotr-b.c: Likewise.
* gcc.target/loongarch/rotl-with-xvrotr-d.c: Likewise.
* gcc.target/loongarch/rotl-with-xvrotr-h.c: Likewise.
* gcc.target/loongarch/rotl-with-xvrotr-w.c: Likewise.
* gcc.target/loongarch/sad-lasx.c: Likewise.
* gcc.target/loongarch/sad-lsx.c: Likewise.
* gcc.target/loongarch/strict-align.c: Likewise.
* gcc.target/loongarch/vec_pack_unpack_128.c: Likewise.
* gcc.target/loongarch/vec_pack_unpack_256.c: Likewise.
* gcc.target/loongarch/vect-extract.c: Likewise.
* gcc.target/loongarch/vect-frint-no-inexact.c: Likewise.
* gcc.target/loongarch/vect-frint-scalar-no-inexact.c: Likewise.
* gcc.target/loongarch/vect-frint-scalar.c: Likewise.
* gcc.target/loongarch/vect-frint.c: Likewise.
* gcc.target/loongarch/vect-ftint-no-inexact.c: Likewise.
* gcc.target/loongarch/vect-ftint.c: Likewise.
* gcc.target/loongarch/vect-ld-st-imm12.c: Likewise.
* gcc.target/loongarch/vect-muh.c: Likewise.
* gcc.target/loongarch/vect-rotr.c: Likewise.
* gcc.target/loongarch/vect-shift-imm-round.c: Likewise.
* gcc.target/loongarch/vect-shuf-fp.c: Likewise.
* gcc.target/loongarch/vect-slp-two-operator.c: Likewise.
* gcc.target/loongarch/vect-widen-add.c: Likewise.
* gcc.target/loongarch/vect-widen-mul.c: Likewise.
* gcc.target/loongarch/vect-widen-sub.c: Likewise.
* gcc.target/loongarch/vector-func-attr-1.c: Likewise.
* gcc.target/loongarch/vector-pragma-attr-1.c: Likewise.
* gcc.target/loongarch/vfcmp-d.c: Likewise.
* gcc.target/loongarch/vfcmp-f.c: Likewise.
* gcc.target/loongarch/vfmax-vfmin.c: Likewise.
* gcc.target/loongarch/vrepli.c: Likewise.
* gcc.target/loongarch/wide-mul-reduc-1.c: Likewise.
* gcc.target/loongarch/wide-mul-reduc-2.c: Likewise.
* gcc.target/loongarch/xorsign.c: Likewise.
* gcc.target/loongarch/xvfcmp-d.c: Likewise.
* gcc.target/loongarch/xvfcmp-f.c: Likewise.
---
gcc/testsuite/gcc.target/loongarch/abd-lsx.c | 1 +
gcc/testsuite/gcc.target/loongarch/avg-ceil-lasx.c | 1 +
gcc/testsuite/gcc.target/loongarch/avg-ceil-lsx.c | 1 +
gcc/testsuite/gcc.target/loongarch/avg-floor-lasx.c | 1 +
gcc/testsuite/gcc.target/loongarch/avg-floor-lsx.c | 1 +
gcc/testsuite/gcc.target/loongarch/lasx-andn-iorn.c | 1 +
.../gcc.target/loongarch/lasx-extract-even_odd-opt.c | 1 +
gcc/testsuite/gcc.target/loongarch/lasx-func-attr-2.c | 1 +
gcc/testsuite/gcc.target/loongarch/lasx-pragma-attr-2.c | 1 +
gcc/testsuite/gcc.target/loongarch/lsx-andn-iorn.c | 1 +
gcc/testsuite/gcc.target/loongarch/lsx-func-attr-2.c | 1 +
gcc/testsuite/gcc.target/loongarch/lsx-pragma-attr-2.c | 1 +
gcc/testsuite/gcc.target/loongarch/mov-zero-1.c | 1 +
gcc/testsuite/gcc.target/loongarch/popcnt.c | 1 +
gcc/testsuite/gcc.target/loongarch/popcount.c | 1 +
gcc/testsuite/gcc.target/loongarch/pr112476-1.c | 1 +
gcc/testsuite/gcc.target/loongarch/pr112476-2.c | 1 +
gcc/testsuite/gcc.target/loongarch/pr112476-3.c | 1 +
gcc/testsuite/gcc.target/loongarch/pr112476-4.c | 1 +
gcc/testsuite/gcc.target/loongarch/pr113033.c | 1 +
gcc/testsuite/gcc.target/loongarch/pragma-push-pop.c | 1 +
gcc/testsuite/gcc.target/loongarch/rotl-with-vrotr-b.c | 1 +
gcc/testsuite/gcc.target/loongarch/rotl-with-vrotr-d.c | 1 +
gcc/testsuite/gcc.target/loongarch/rotl-with-vrotr-h.c | 1 +
gcc/testsuite/gcc.target/loongarch/rotl-with-vrotr-w.c | 1 +
gcc/testsuite/gcc.target/loongarch/rotl-with-xvrotr-b.c | 1 +
gcc/testsuite/gcc.target/loongarch/rotl-with-xvrotr-d.c | 1 +
gcc/testsuite/gcc.target/loongarch/rotl-with-xvrotr-h.c | 1 +
gcc/testsuite/gcc.target/loongarch/rotl-with-xvrotr-w.c | 1 +
gcc/testsuite/gcc.target/loongarch/sad-lasx.c | 1 +
gcc/testsuite/gcc.target/loongarch/sad-lsx.c | 1 +
gcc/testsuite/gcc.target/loongarch/strict-align.c | 1 +
gcc/testsuite/gcc.target/loongarch/vec_pack_unpack_128.c | 1 +
gcc/testsuite/gcc.target/loongarch/vec_pack_unpack_256.c | 1 +
gcc/testsuite/gcc.target/loongarch/vect-extract.c | 1 +
gcc/testsuite/gcc.target/loongarch/vect-frint-no-inexact.c | 1 +
.../gcc.target/loongarch/vect-frint-scalar-no-inexact.c | 1 +
gcc/testsuite/gcc.target/loongarch/vect-frint-scalar.c | 1 +
gcc/testsuite/gcc.target/loongarch/vect-frint.c | 1 +
gcc/testsuite/gcc.target/loongarch/vect-ftint-no-inexact.c | 5 +++++
gcc/testsuite/gcc.target/loongarch/vect-ftint.c | 5 +++++
gcc/testsuite/gcc.target/loongarch/vect-ld-st-imm12.c | 1 +
gcc/testsuite/gcc.target/loongarch/vect-muh.c | 1 +
gcc/testsuite/gcc.target/loongarch/vect-rotr.c | 1 +
gcc/testsuite/gcc.target/loongarch/vect-shift-imm-round.c | 1 +
gcc/testsuite/gcc.target/loongarch/vect-shuf-fp.c | 1 +
gcc/testsuite/gcc.target/loongarch/vect-slp-two-operator.c | 1 +
gcc/testsuite/gcc.target/loongarch/vect-widen-add.c | 1 +
gcc/testsuite/gcc.target/loongarch/vect-widen-mul.c | 1 +
gcc/testsuite/gcc.target/loongarch/vect-widen-sub.c | 1 +
gcc/testsuite/gcc.target/loongarch/vector-func-attr-1.c | 1 +
gcc/testsuite/gcc.target/loongarch/vector-pragma-attr-1.c | 1 +
gcc/testsuite/gcc.target/loongarch/vfcmp-d.c | 1 +
gcc/testsuite/gcc.target/loongarch/vfcmp-f.c | 1 +
gcc/testsuite/gcc.target/loongarch/vfmax-vfmin.c | 1 +
gcc/testsuite/gcc.target/loongarch/vrepli.c | 1 +
gcc/testsuite/gcc.target/loongarch/wide-mul-reduc-1.c | 1 +
gcc/testsuite/gcc.target/loongarch/wide-mul-reduc-2.c | 1 +
gcc/testsuite/gcc.target/loongarch/xorsign.c | 1 +
gcc/testsuite/gcc.target/loongarch/xvfcmp-d.c | 1 +
gcc/testsuite/gcc.target/loongarch/xvfcmp-f.c | 1 +
61 files changed, 69 insertions(+)
diff --git a/gcc/testsuite/gcc.target/loongarch/abd-lsx.c
b/gcc/testsuite/gcc.target/loongarch/abd-lsx.c
index c036888e3e4..efcf939ccb2 100644
--- a/gcc/testsuite/gcc.target/loongarch/abd-lsx.c
+++ b/gcc/testsuite/gcc.target/loongarch/abd-lsx.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O3 -mlsx -fdump-rtl-expand-all" } */
#define ABD(x, y) ((x - y > 0) ? (x - y) : -(x - y))
diff --git a/gcc/testsuite/gcc.target/loongarch/avg-ceil-lasx.c
b/gcc/testsuite/gcc.target/loongarch/avg-ceil-lasx.c
index 16db7bf7237..ea0ed689012 100644
--- a/gcc/testsuite/gcc.target/loongarch/avg-ceil-lasx.c
+++ b/gcc/testsuite/gcc.target/loongarch/avg-ceil-lasx.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O3 -mlasx" } */
/* { dg-final { scan-assembler "xvavgr.b" } } */
/* { dg-final { scan-assembler "xvavgr.bu" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/avg-ceil-lsx.c
b/gcc/testsuite/gcc.target/loongarch/avg-ceil-lsx.c
index 94119c23b93..5298ab2056d 100644
--- a/gcc/testsuite/gcc.target/loongarch/avg-ceil-lsx.c
+++ b/gcc/testsuite/gcc.target/loongarch/avg-ceil-lsx.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O3 -mlsx" } */
/* { dg-final { scan-assembler "vavgr.b" } } */
/* { dg-final { scan-assembler "vavgr.bu" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/avg-floor-lasx.c
b/gcc/testsuite/gcc.target/loongarch/avg-floor-lasx.c
index da6896531b9..ecf484a04c0 100644
--- a/gcc/testsuite/gcc.target/loongarch/avg-floor-lasx.c
+++ b/gcc/testsuite/gcc.target/loongarch/avg-floor-lasx.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O3 -mlasx" } */
/* { dg-final { scan-assembler "xvavg.b" } } */
/* { dg-final { scan-assembler "xvavg.bu" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/avg-floor-lsx.c
b/gcc/testsuite/gcc.target/loongarch/avg-floor-lsx.c
index bbb9db527a3..9c0b71d6836 100644
--- a/gcc/testsuite/gcc.target/loongarch/avg-floor-lsx.c
+++ b/gcc/testsuite/gcc.target/loongarch/avg-floor-lsx.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O3 -mlsx" } */
/* { dg-final { scan-assembler "vavg.b" } } */
/* { dg-final { scan-assembler "vavg.bu" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/lasx-andn-iorn.c
b/gcc/testsuite/gcc.target/loongarch/lasx-andn-iorn.c
index 86b04dbbb33..d9be7c9847d 100644
--- a/gcc/testsuite/gcc.target/loongarch/lasx-andn-iorn.c
+++ b/gcc/testsuite/gcc.target/loongarch/lasx-andn-iorn.c
@@ -3,6 +3,7 @@
#include "./lsx-andn-iorn.c"
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -mlasx -ftree-vectorize -fdump-tree-optimized" } */
/* We should produce a BIT_ANDC and BIT_IORC here. */
diff --git a/gcc/testsuite/gcc.target/loongarch/lasx-extract-even_odd-opt.c
b/gcc/testsuite/gcc.target/loongarch/lasx-extract-even_odd-opt.c
index 515f0c8621a..5d2ac83cc4c 100644
--- a/gcc/testsuite/gcc.target/loongarch/lasx-extract-even_odd-opt.c
+++ b/gcc/testsuite/gcc.target/loongarch/lasx-extract-even_odd-opt.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O3 -mlasx" } */
/* { dg-final { scan-assembler "xvilvl.d" } } */
/* { dg-final { scan-assembler "xvilvh.d" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/lasx-func-attr-2.c
b/gcc/testsuite/gcc.target/loongarch/lasx-func-attr-2.c
index 33cc924d0e4..add46241a56 100644
--- a/gcc/testsuite/gcc.target/loongarch/lasx-func-attr-2.c
+++ b/gcc/testsuite/gcc.target/loongarch/lasx-func-attr-2.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -mlasx" } */
typedef int v8i32 __attribute__ ((vector_size(32), aligned(32)));
diff --git a/gcc/testsuite/gcc.target/loongarch/lasx-pragma-attr-2.c
b/gcc/testsuite/gcc.target/loongarch/lasx-pragma-attr-2.c
index 67e4f7179fa..a2af68ac2ac 100644
--- a/gcc/testsuite/gcc.target/loongarch/lasx-pragma-attr-2.c
+++ b/gcc/testsuite/gcc.target/loongarch/lasx-pragma-attr-2.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -mlasx" } */
typedef int v8i32 __attribute__ ((vector_size(32), aligned(32)));
diff --git a/gcc/testsuite/gcc.target/loongarch/lsx-andn-iorn.c
b/gcc/testsuite/gcc.target/loongarch/lsx-andn-iorn.c
index 14838ab8bff..f31b3b293e8 100644
--- a/gcc/testsuite/gcc.target/loongarch/lsx-andn-iorn.c
+++ b/gcc/testsuite/gcc.target/loongarch/lsx-andn-iorn.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O2 -mlsx -ftree-vectorize -fdump-tree-optimized" } */
#ifndef N
diff --git a/gcc/testsuite/gcc.target/loongarch/lsx-func-attr-2.c
b/gcc/testsuite/gcc.target/loongarch/lsx-func-attr-2.c
index 97475fff579..1bde4bfb39a 100644
--- a/gcc/testsuite/gcc.target/loongarch/lsx-func-attr-2.c
+++ b/gcc/testsuite/gcc.target/loongarch/lsx-func-attr-2.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O2 -mlsx" } */
typedef int v4i32 __attribute__ ((vector_size(16), aligned(16)));
diff --git a/gcc/testsuite/gcc.target/loongarch/lsx-pragma-attr-2.c
b/gcc/testsuite/gcc.target/loongarch/lsx-pragma-attr-2.c
index 40314d026eb..96d30f13f1c 100644
--- a/gcc/testsuite/gcc.target/loongarch/lsx-pragma-attr-2.c
+++ b/gcc/testsuite/gcc.target/loongarch/lsx-pragma-attr-2.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O2 -mlsx" } */
typedef int v4i32 __attribute__ ((vector_size(16), aligned(16)));
diff --git a/gcc/testsuite/gcc.target/loongarch/mov-zero-1.c
b/gcc/testsuite/gcc.target/loongarch/mov-zero-1.c
index 4744f2f2fdb..2ac8d19f6ec 100644
--- a/gcc/testsuite/gcc.target/loongarch/mov-zero-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/mov-zero-1.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O2 -mlsx" } */
/* { dg-final { scan-assembler-times "vxor\\.v" 2 } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/popcnt.c
b/gcc/testsuite/gcc.target/loongarch/popcnt.c
index a10fca42092..4ee527a0db0 100644
--- a/gcc/testsuite/gcc.target/loongarch/popcnt.c
+++ b/gcc/testsuite/gcc.target/loongarch/popcnt.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O2 -mlsx" } */
/* { dg-final { scan-assembler-not {popcount} } } */
/* { dg-final { scan-assembler-times "vpcnt.d" 2 { target { loongarch64*-*-* }
} } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/popcount.c
b/gcc/testsuite/gcc.target/loongarch/popcount.c
index 390ff067617..00947b4d9e5 100644
--- a/gcc/testsuite/gcc.target/loongarch/popcount.c
+++ b/gcc/testsuite/gcc.target/loongarch/popcount.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O2 -mlsx -fdump-tree-optimized" } */
/* { dg-final { scan-tree-dump-times "__builtin_popcount|\\.POPCOUNT" 1
"optimized" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/pr112476-1.c
b/gcc/testsuite/gcc.target/loongarch/pr112476-1.c
index 4cf133e7a26..96951d688c1 100644
--- a/gcc/testsuite/gcc.target/loongarch/pr112476-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/pr112476-1.c
@@ -1,5 +1,6 @@
/* PR target/112476: ICE with -mlsx */
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O2 -march=loongarch64 -mfpu=64 -mabi=lp64d -mlsx" } */
int foo, bar;
diff --git a/gcc/testsuite/gcc.target/loongarch/pr112476-2.c
b/gcc/testsuite/gcc.target/loongarch/pr112476-2.c
index cc0dfbfc912..7abdd9a0dbb 100644
--- a/gcc/testsuite/gcc.target/loongarch/pr112476-2.c
+++ b/gcc/testsuite/gcc.target/loongarch/pr112476-2.c
@@ -1,5 +1,6 @@
/* PR target/112476: ICE with -mlasx */
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -march=loongarch64 -mfpu=64 -mabi=lp64d -mlasx" } */
#include "pr112476-1.c"
diff --git a/gcc/testsuite/gcc.target/loongarch/pr112476-3.c
b/gcc/testsuite/gcc.target/loongarch/pr112476-3.c
index d696d4182bb..c0980623a88 100644
--- a/gcc/testsuite/gcc.target/loongarch/pr112476-3.c
+++ b/gcc/testsuite/gcc.target/loongarch/pr112476-3.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O3 -mlsx" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/loongarch/pr112476-4.c
b/gcc/testsuite/gcc.target/loongarch/pr112476-4.c
index 955d98552eb..029448476f3 100644
--- a/gcc/testsuite/gcc.target/loongarch/pr112476-4.c
+++ b/gcc/testsuite/gcc.target/loongarch/pr112476-4.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O3 -mlasx" } */
#include "pr112476-3.c"
diff --git a/gcc/testsuite/gcc.target/loongarch/pr113033.c
b/gcc/testsuite/gcc.target/loongarch/pr113033.c
index 4ccd037d846..6a6ba2edbe3 100644
--- a/gcc/testsuite/gcc.target/loongarch/pr113033.c
+++ b/gcc/testsuite/gcc.target/loongarch/pr113033.c
@@ -1,5 +1,6 @@
/* PR target/113033: ICE with vector left rotate */
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -mlasx" } */
typedef unsigned __attribute__ ((vector_size (16))) v4si;
diff --git a/gcc/testsuite/gcc.target/loongarch/pragma-push-pop.c
b/gcc/testsuite/gcc.target/loongarch/pragma-push-pop.c
index a2bcdcb10d5..e63e2712f25 100644
--- a/gcc/testsuite/gcc.target/loongarch/pragma-push-pop.c
+++ b/gcc/testsuite/gcc.target/loongarch/pragma-push-pop.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -mlasx" } */
/* { dg-final { scan-assembler-not "xvadd\\\.w" } } */
/* { dg-final { scan-assembler "xvsll\\\.w" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/rotl-with-vrotr-b.c
b/gcc/testsuite/gcc.target/loongarch/rotl-with-vrotr-b.c
index 14298bf9ee4..4526bf0c178 100644
--- a/gcc/testsuite/gcc.target/loongarch/rotl-with-vrotr-b.c
+++ b/gcc/testsuite/gcc.target/loongarch/rotl-with-vrotr-b.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O2 -mlsx -fno-vect-cost-model" } */
/* { dg-final { scan-assembler-times "vrotr\\.b" 2 } } */
/* { dg-final { scan-assembler-times "vneg\\.b" 1 } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/rotl-with-vrotr-d.c
b/gcc/testsuite/gcc.target/loongarch/rotl-with-vrotr-d.c
index 0e971b3235c..c4ff44666e4 100644
--- a/gcc/testsuite/gcc.target/loongarch/rotl-with-vrotr-d.c
+++ b/gcc/testsuite/gcc.target/loongarch/rotl-with-vrotr-d.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O2 -mlsx -fno-vect-cost-model" } */
/* { dg-final { scan-assembler-times "vrotr\\.d" 2 } } */
/* { dg-final { scan-assembler-times "vneg\\.d" 1 } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/rotl-with-vrotr-h.c
b/gcc/testsuite/gcc.target/loongarch/rotl-with-vrotr-h.c
index 93216ebc245..d35f7c3c40b 100644
--- a/gcc/testsuite/gcc.target/loongarch/rotl-with-vrotr-h.c
+++ b/gcc/testsuite/gcc.target/loongarch/rotl-with-vrotr-h.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O2 -mlsx -fno-vect-cost-model" } */
/* { dg-final { scan-assembler-times "vrotr\\.h" 2 } } */
/* { dg-final { scan-assembler-times "vneg\\.h" 1 } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/rotl-with-vrotr-w.c
b/gcc/testsuite/gcc.target/loongarch/rotl-with-vrotr-w.c
index d05b86f4716..7b96f052669 100644
--- a/gcc/testsuite/gcc.target/loongarch/rotl-with-vrotr-w.c
+++ b/gcc/testsuite/gcc.target/loongarch/rotl-with-vrotr-w.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O2 -mlsx -fno-vect-cost-model" } */
/* { dg-final { scan-assembler-times "vrotr\\.w" 2 } } */
/* { dg-final { scan-assembler-times "vneg\\.w" 1 } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/rotl-with-xvrotr-b.c
b/gcc/testsuite/gcc.target/loongarch/rotl-with-xvrotr-b.c
index 2674b1b618c..111a247dba0 100644
--- a/gcc/testsuite/gcc.target/loongarch/rotl-with-xvrotr-b.c
+++ b/gcc/testsuite/gcc.target/loongarch/rotl-with-xvrotr-b.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -mlasx -fno-vect-cost-model" } */
/* { dg-final { scan-assembler-times "xvrotr\\.b" 2 } } */
/* { dg-final { scan-assembler-times "xvneg\\.b" 1 } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/rotl-with-xvrotr-d.c
b/gcc/testsuite/gcc.target/loongarch/rotl-with-xvrotr-d.c
index e9440331594..adf8e1708d8 100644
--- a/gcc/testsuite/gcc.target/loongarch/rotl-with-xvrotr-d.c
+++ b/gcc/testsuite/gcc.target/loongarch/rotl-with-xvrotr-d.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -mlasx -fno-vect-cost-model" } */
/* { dg-final { scan-assembler-times "xvrotr\\.d" 2 } } */
/* { dg-final { scan-assembler-times "xvneg\\.d" 1 } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/rotl-with-xvrotr-h.c
b/gcc/testsuite/gcc.target/loongarch/rotl-with-xvrotr-h.c
index 3d998941f92..8ae457f3b77 100644
--- a/gcc/testsuite/gcc.target/loongarch/rotl-with-xvrotr-h.c
+++ b/gcc/testsuite/gcc.target/loongarch/rotl-with-xvrotr-h.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -mlasx -fno-vect-cost-model" } */
/* { dg-final { scan-assembler-times "xvrotr\\.h" 2 } } */
/* { dg-final { scan-assembler-times "xvneg\\.h" 1 } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/rotl-with-xvrotr-w.c
b/gcc/testsuite/gcc.target/loongarch/rotl-with-xvrotr-w.c
index ca6aa7bae6c..55d1ff88a2b 100644
--- a/gcc/testsuite/gcc.target/loongarch/rotl-with-xvrotr-w.c
+++ b/gcc/testsuite/gcc.target/loongarch/rotl-with-xvrotr-w.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -mlasx -fno-vect-cost-model" } */
/* { dg-final { scan-assembler-times "xvrotr\\.w" 2 } } */
/* { dg-final { scan-assembler-times "xvneg\\.w" 1 } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/sad-lasx.c
b/gcc/testsuite/gcc.target/loongarch/sad-lasx.c
index 6c0cdfd97b4..90a38b7afe4 100644
--- a/gcc/testsuite/gcc.target/loongarch/sad-lasx.c
+++ b/gcc/testsuite/gcc.target/loongarch/sad-lasx.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O3 -mlasx" } */
#define N 1024
diff --git a/gcc/testsuite/gcc.target/loongarch/sad-lsx.c
b/gcc/testsuite/gcc.target/loongarch/sad-lsx.c
index b92110a8b2c..a348de009e5 100644
--- a/gcc/testsuite/gcc.target/loongarch/sad-lsx.c
+++ b/gcc/testsuite/gcc.target/loongarch/sad-lsx.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O3 -mlsx" } */
#define N 1024
diff --git a/gcc/testsuite/gcc.target/loongarch/strict-align.c
b/gcc/testsuite/gcc.target/loongarch/strict-align.c
index 040d849584b..1b7d08d747e 100644
--- a/gcc/testsuite/gcc.target/loongarch/strict-align.c
+++ b/gcc/testsuite/gcc.target/loongarch/strict-align.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-Ofast -mstrict-align -mlasx" } */
/* { dg-final { scan-assembler-not "vfadd.s" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/vec_pack_unpack_128.c
b/gcc/testsuite/gcc.target/loongarch/vec_pack_unpack_128.c
index 164b01e245d..2f32a66d555 100644
--- a/gcc/testsuite/gcc.target/loongarch/vec_pack_unpack_128.c
+++ b/gcc/testsuite/gcc.target/loongarch/vec_pack_unpack_128.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-mlsx -O3" } */
#define N 128
diff --git a/gcc/testsuite/gcc.target/loongarch/vec_pack_unpack_256.c
b/gcc/testsuite/gcc.target/loongarch/vec_pack_unpack_256.c
index 5b2fd9b0599..7d91330bc68 100644
--- a/gcc/testsuite/gcc.target/loongarch/vec_pack_unpack_256.c
+++ b/gcc/testsuite/gcc.target/loongarch/vec_pack_unpack_256.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-mlasx -O3" } */
#define N 128
diff --git a/gcc/testsuite/gcc.target/loongarch/vect-extract.c
b/gcc/testsuite/gcc.target/loongarch/vect-extract.c
index ce126e3a4f1..7d3a3e0397e 100644
--- a/gcc/testsuite/gcc.target/loongarch/vect-extract.c
+++ b/gcc/testsuite/gcc.target/loongarch/vect-extract.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -ffast-math -mlasx -fno-vect-cost-model
-fno-unroll-loops" } */
/* { dg-final { scan-assembler-not "xvpickve.w" } } */
/* { dg-final { scan-assembler-not "xvpickve.d" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/vect-frint-no-inexact.c
b/gcc/testsuite/gcc.target/loongarch/vect-frint-no-inexact.c
index e20eaea205a..0b9c673fc4b 100644
--- a/gcc/testsuite/gcc.target/loongarch/vect-frint-no-inexact.c
+++ b/gcc/testsuite/gcc.target/loongarch/vect-frint-no-inexact.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -mabi=lp64d -mdouble-float -fno-math-errno
-fno-fp-int-builtin-inexact -mlasx -mcmodel=normal" } */
#include "vect-frint.c"
diff --git a/gcc/testsuite/gcc.target/loongarch/vect-frint-scalar-no-inexact.c
b/gcc/testsuite/gcc.target/loongarch/vect-frint-scalar-no-inexact.c
index d5f0933537d..3ae6e398dbd 100644
--- a/gcc/testsuite/gcc.target/loongarch/vect-frint-scalar-no-inexact.c
+++ b/gcc/testsuite/gcc.target/loongarch/vect-frint-scalar-no-inexact.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O2 -mlsx -fno-fp-int-builtin-inexact -mcmodel=normal" } */
#include "vect-frint-scalar.c"
diff --git a/gcc/testsuite/gcc.target/loongarch/vect-frint-scalar.c
b/gcc/testsuite/gcc.target/loongarch/vect-frint-scalar.c
index 171ba98f00b..f241bc90e8e 100644
--- a/gcc/testsuite/gcc.target/loongarch/vect-frint-scalar.c
+++ b/gcc/testsuite/gcc.target/loongarch/vect-frint-scalar.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O2 -mlsx -ffp-int-builtin-inexact -mcmodel=normal" } */
#define test(func, suffix) \
diff --git a/gcc/testsuite/gcc.target/loongarch/vect-frint.c
b/gcc/testsuite/gcc.target/loongarch/vect-frint.c
index bda041bdf91..8d829411be5 100644
--- a/gcc/testsuite/gcc.target/loongarch/vect-frint.c
+++ b/gcc/testsuite/gcc.target/loongarch/vect-frint.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -mabi=lp64d -mdouble-float -fno-math-errno
-ffp-int-builtin-inexact -mlasx -mcmodel=normal" } */
float out_x[8];
diff --git a/gcc/testsuite/gcc.target/loongarch/vect-ftint-no-inexact.c
b/gcc/testsuite/gcc.target/loongarch/vect-ftint-no-inexact.c
index 3fa97531d59..dea90e41705 100644
--- a/gcc/testsuite/gcc.target/loongarch/vect-ftint-no-inexact.c
+++ b/gcc/testsuite/gcc.target/loongarch/vect-ftint-no-inexact.c
@@ -1,5 +1,10 @@
/* { dg-do compile } */
+<<<<<<< HEAD
/* { dg-options "-O2 -mabi=lp64d -mdouble-float -fno-math-errno
-fno-fp-int-builtin-inexact -mlasx -mcmodel=normal" } */
+=======
+/* { dg-require-effective-target loongarch_asx } */
+/* { dg-options "-O2 -mabi=lp64d -mdouble-float -fno-math-errno
-fno-fp-int-builtin-inexact -mlasx" } */
+>>>>>>> cfaa019e019 (LoongArch: Add loongarch_sx condition to vector testcases)
#include "vect-ftint.c"
diff --git a/gcc/testsuite/gcc.target/loongarch/vect-ftint.c
b/gcc/testsuite/gcc.target/loongarch/vect-ftint.c
index 96da3cd7b57..109db8a14b8 100644
--- a/gcc/testsuite/gcc.target/loongarch/vect-ftint.c
+++ b/gcc/testsuite/gcc.target/loongarch/vect-ftint.c
@@ -1,5 +1,10 @@
/* { dg-do compile } */
+<<<<<<< HEAD
/* { dg-options "-O2 -mabi=lp64d -mdouble-float -fno-math-errno
-ffp-int-builtin-inexact -mlasx -mcmodel=normal" } */
+=======
+/* { dg-require-effective-target loongarch_asx } */
+/* { dg-options "-O2 -mabi=lp64d -mdouble-float -fno-math-errno
-ffp-int-builtin-inexact -mlasx" } */
+>>>>>>> cfaa019e019 (LoongArch: Add loongarch_sx condition to vector testcases)
int out_x[8];
long out_y[4];
diff --git a/gcc/testsuite/gcc.target/loongarch/vect-ld-st-imm12.c
b/gcc/testsuite/gcc.target/loongarch/vect-ld-st-imm12.c
index bfc208e4fe8..ed8a71843f3 100644
--- a/gcc/testsuite/gcc.target/loongarch/vect-ld-st-imm12.c
+++ b/gcc/testsuite/gcc.target/loongarch/vect-ld-st-imm12.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-march=loongarch64 -mabi=lp64d -mlasx -O2" } */
/* { dg-final { scan-assembler-not "addi.d" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/vect-muh.c
b/gcc/testsuite/gcc.target/loongarch/vect-muh.c
index a788840b23c..097be5e3d19 100644
--- a/gcc/testsuite/gcc.target/loongarch/vect-muh.c
+++ b/gcc/testsuite/gcc.target/loongarch/vect-muh.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-mlasx -O3" } */
/* { dg-final { scan-assembler "\tvmuh\.w\t" } } */
/* { dg-final { scan-assembler "\tvmuh\.wu\t" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/vect-rotr.c
b/gcc/testsuite/gcc.target/loongarch/vect-rotr.c
index 733c36334ce..8b3ac422a94 100644
--- a/gcc/testsuite/gcc.target/loongarch/vect-rotr.c
+++ b/gcc/testsuite/gcc.target/loongarch/vect-rotr.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -mlasx" } */
/* { dg-final { scan-assembler "\tvrotr\.w\t" } } */
/* { dg-final { scan-assembler "\txvrotr\.w\t" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/vect-shift-imm-round.c
b/gcc/testsuite/gcc.target/loongarch/vect-shift-imm-round.c
index 6f16566ba9b..8df35b8938c 100644
--- a/gcc/testsuite/gcc.target/loongarch/vect-shift-imm-round.c
+++ b/gcc/testsuite/gcc.target/loongarch/vect-shift-imm-round.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O2 -march=loongarch64 -mlsx" } */
/* { dg-final { scan-assembler "vsrari\\.w\t\\\$vr\[0-9\]+,\\\$vr\[0-9\]+,15"
} } */
diff --git a/gcc/testsuite/gcc.target/loongarch/vect-shuf-fp.c
b/gcc/testsuite/gcc.target/loongarch/vect-shuf-fp.c
index 7acc2113afe..e2d5e47b1ea 100644
--- a/gcc/testsuite/gcc.target/loongarch/vect-shuf-fp.c
+++ b/gcc/testsuite/gcc.target/loongarch/vect-shuf-fp.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-mlasx -O3" } */
/* { dg-final { scan-assembler "vshuf\.w" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/vect-slp-two-operator.c
b/gcc/testsuite/gcc.target/loongarch/vect-slp-two-operator.c
index 43b46759902..ea6f1084f2a 100644
--- a/gcc/testsuite/gcc.target/loongarch/vect-slp-two-operator.c
+++ b/gcc/testsuite/gcc.target/loongarch/vect-slp-two-operator.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -mlasx -ftree-vectorize -fdump-tree-vect
-fdump-tree-vect-details" } */
typedef unsigned char uint8_t;
diff --git a/gcc/testsuite/gcc.target/loongarch/vect-widen-add.c
b/gcc/testsuite/gcc.target/loongarch/vect-widen-add.c
index 0bf832d0e8a..2357c664676 100644
--- a/gcc/testsuite/gcc.target/loongarch/vect-widen-add.c
+++ b/gcc/testsuite/gcc.target/loongarch/vect-widen-add.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O3 -mlasx" } */
/* { dg-final { scan-assembler "xvaddwev.w.h" } } */
/* { dg-final { scan-assembler "xvaddwod.w.h" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/vect-widen-mul.c
b/gcc/testsuite/gcc.target/loongarch/vect-widen-mul.c
index 84b020eea26..2c1b7469f5f 100644
--- a/gcc/testsuite/gcc.target/loongarch/vect-widen-mul.c
+++ b/gcc/testsuite/gcc.target/loongarch/vect-widen-mul.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O3 -mlasx" } */
/* { dg-final { scan-assembler "xvmulwev.w.h" } } */
/* { dg-final { scan-assembler "xvmulwod.w.h" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/vect-widen-sub.c
b/gcc/testsuite/gcc.target/loongarch/vect-widen-sub.c
index 69fc3a5174f..8dd570549b2 100644
--- a/gcc/testsuite/gcc.target/loongarch/vect-widen-sub.c
+++ b/gcc/testsuite/gcc.target/loongarch/vect-widen-sub.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O3 -mlasx" } */
/* { dg-final { scan-assembler "xvsubwev.w.h" } } */
/* { dg-final { scan-assembler "xvsubwod.w.h" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/vector-func-attr-1.c
b/gcc/testsuite/gcc.target/loongarch/vector-func-attr-1.c
index 4e00606b1c6..35072916fcb 100644
--- a/gcc/testsuite/gcc.target/loongarch/vector-func-attr-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/vector-func-attr-1.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O2 -mlsx" } */
typedef int v4i32 __attribute__ ((vector_size(16), aligned(16)));
diff --git a/gcc/testsuite/gcc.target/loongarch/vector-pragma-attr-1.c
b/gcc/testsuite/gcc.target/loongarch/vector-pragma-attr-1.c
index 7bbb1690113..9ff570e451d 100644
--- a/gcc/testsuite/gcc.target/loongarch/vector-pragma-attr-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/vector-pragma-attr-1.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O2 -mlsx" } */
#define TEST_TARGET_PRAGMA 1
diff --git a/gcc/testsuite/gcc.target/loongarch/vfcmp-d.c
b/gcc/testsuite/gcc.target/loongarch/vfcmp-d.c
index 87e4ed19e96..664949eda44 100644
--- a/gcc/testsuite/gcc.target/loongarch/vfcmp-d.c
+++ b/gcc/testsuite/gcc.target/loongarch/vfcmp-d.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O2 -mlsx -fno-vect-cost-model" } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/vfcmp-f.c
b/gcc/testsuite/gcc.target/loongarch/vfcmp-f.c
index 8d2671998ec..90e67c98d2a 100644
--- a/gcc/testsuite/gcc.target/loongarch/vfcmp-f.c
+++ b/gcc/testsuite/gcc.target/loongarch/vfcmp-f.c
@@ -2,6 +2,7 @@
For details read C23 Annex F.3 and LoongArch Vol. 1 section 3.2.2.1. */
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O2 -mlsx -fno-vect-cost-model" } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/vfmax-vfmin.c
b/gcc/testsuite/gcc.target/loongarch/vfmax-vfmin.c
index 811fee361c3..cf69db09255 100644
--- a/gcc/testsuite/gcc.target/loongarch/vfmax-vfmin.c
+++ b/gcc/testsuite/gcc.target/loongarch/vfmax-vfmin.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -mtune=la464 -mlasx" } */
/* { dg-final { scan-assembler "\tvfmin\\.d" } } */
/* { dg-final { scan-assembler "\tvfmax\\.d" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/vrepli.c
b/gcc/testsuite/gcc.target/loongarch/vrepli.c
index 8deeb478890..ff786557fc0 100644
--- a/gcc/testsuite/gcc.target/loongarch/vrepli.c
+++ b/gcc/testsuite/gcc.target/loongarch/vrepli.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -mlasx" } */
/* { dg-final { scan-assembler "\tvrepli\\.b\t\\\$vr\[0-9\]+,-35" } } */
/* { dg-final { scan-assembler "\txvrepli\\.b\t\\\$xr\[0-9\]+,-35" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/wide-mul-reduc-1.c
b/gcc/testsuite/gcc.target/loongarch/wide-mul-reduc-1.c
index d6e0da59dc4..f46c024fa02 100644
--- a/gcc/testsuite/gcc.target/loongarch/wide-mul-reduc-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/wide-mul-reduc-1.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -mlasx -fdump-tree-optimized" } */
/* { dg-final { scan-tree-dump "WIDEN_MULT_EVEN_EXPR" "optimized" } } */
/* { dg-final { scan-tree-dump "WIDEN_MULT_ODD_EXPR" "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/wide-mul-reduc-2.c
b/gcc/testsuite/gcc.target/loongarch/wide-mul-reduc-2.c
index 61e92e58fc3..ef54d88c786 100644
--- a/gcc/testsuite/gcc.target/loongarch/wide-mul-reduc-2.c
+++ b/gcc/testsuite/gcc.target/loongarch/wide-mul-reduc-2.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -mlasx -fdump-tree-optimized" } */
/* { dg-final { scan-assembler "xvmaddw(ev|od)\\.d\\.w" } } */
/* { dg-final { scan-tree-dump "DOT_PROD_EXPR" "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/xorsign.c
b/gcc/testsuite/gcc.target/loongarch/xorsign.c
index ca80603d48b..cb11d32c047 100644
--- a/gcc/testsuite/gcc.target/loongarch/xorsign.c
+++ b/gcc/testsuite/gcc.target/loongarch/xorsign.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O2 -mlsx" } */
/* { dg-final { scan-assembler "vand\\.v" } } */
/* { dg-final { scan-assembler "vxor\\.v" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/xvfcmp-d.c
b/gcc/testsuite/gcc.target/loongarch/xvfcmp-d.c
index b27efebad8c..619e5dcd5f4 100644
--- a/gcc/testsuite/gcc.target/loongarch/xvfcmp-d.c
+++ b/gcc/testsuite/gcc.target/loongarch/xvfcmp-d.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -mlasx -fno-vect-cost-model" } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/xvfcmp-f.c
b/gcc/testsuite/gcc.target/loongarch/xvfcmp-f.c
index 1ca1e6c8b69..fe4604d5327 100644
--- a/gcc/testsuite/gcc.target/loongarch/xvfcmp-f.c
+++ b/gcc/testsuite/gcc.target/loongarch/xvfcmp-f.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -mlasx -fno-vect-cost-model" } */
/* { dg-final { check-function-bodies "**" "" } } */
--
2.34.1
