gcc/testsuite/ChangeLog:
* g++.target/loongarch/bytepick.C: Add target { loongarch64*-*-* }
condition.
* g++.target/loongarch/got-load.C: Likewise.
* g++.target/loongarch/pr106828.C: Likewise.
* g++.target/loongarch/vect-ashr-lshr.C: Add loongarch_asx condition.
* gcc.dg/ifcvt-4.c: Skip on la32.
* gcc.dg/stack-usage-1.c: Change __loongarch_lp64 to __loongarch__.
* gcc.dg/tree-ssa/gen-vect-2.c: Disable on LoongArch.
* gcc.dg/tree-ssa/gen-vect-25.c: Likewise.
* gcc.dg/tree-ssa/pr83403-1.c: Add additional option.
* gcc.dg/tree-ssa/pr83403-2.c: Likewise.
* gcc.target/loongarch/add-const.c: Add target { loongarch64*-*-* }
condition.
* gcc.target/loongarch/alsl-cost.c: Likewise.
* gcc.target/loongarch/alsl_wu.c: Likewise.
* gcc.target/loongarch/arch-func-attr-1.c: Likewise.
* gcc.target/loongarch/arch-pragma-attr-1.c: Likewise.
* gcc.target/loongarch/bitint-args.c: Match st.w or stptr.w.
* gcc.target/loongarch/bitwise-shift-reassoc.c: Add target
{ loongarch64*-*-* } condition.
* gcc.target/loongarch/bitwise_extend.c: Likewise.
* gcc.target/loongarch/bstrins-1.c: Likewise.
* gcc.target/loongarch/bstrins-2.c: Likewise.
* gcc.target/loongarch/bstrins-3.c: Likewise.
* gcc.target/loongarch/bstrins-4.c: Likewise.
* gcc.target/loongarch/bstrpick_alsl_paired.c: Likewise.
* gcc.target/loongarch/bytepick_shift_128.c: Likewise.
* gcc.target/loongarch/can_inline_1.c: Likewise.
* gcc.target/loongarch/can_inline_2.c: Likewise.
* gcc.target/loongarch/can_inline_3.c: Likewise.
* gcc.target/loongarch/can_inline_4.c: Likewise.
* gcc.target/loongarch/can_inline_5.c: Likewise.
* gcc.target/loongarch/can_inline_6.c: Likewise.
* gcc.target/loongarch/cmodel-extreme-1.c: Likewise.
* gcc.target/loongarch/cmodel-extreme-2.c: Likewise.
* gcc.target/loongarch/cmodel-func-attr-1.c: Likewise.
* gcc.target/loongarch/cmodel-pragma-attr-1.c: Likewise.
* gcc.target/loongarch/cmov_ii.c: Add target { loongarch64*-*-* }
condition and ignore maskeqz and masknez order.
* gcc.target/loongarch/conditional-move-opt-1.c: Add target
{ loongarch64*-*-* } condition.
* gcc.target/loongarch/conditional-move-opt-2.c: Likewise.
* gcc.target/loongarch/crc-sext.c: Likewise.
* gcc.target/loongarch/div-div32.c: Likewise.
* gcc.target/loongarch/div-no-div32.c: Likewise.
* gcc.target/loongarch/divf.c: Add hard float condition.
* gcc.target/loongarch/explicit-relocs-auto-single-load-store-2.c: Add
target { loongarch64*-*-* } condition.
*
gcc.target/loongarch/explicit-relocs-auto-single-load-store-no-anchor.c:
Likewise.
* gcc.target/loongarch/explicit-relocs-auto-single-load-store.c:
Likewise.
* gcc.target/loongarch/explicit-relocs-medium-call36-auto-tls-ld-gd.c:
Likewise.
* gcc.target/loongarch/fclass-compile.c: Likewise.
* gcc.target/loongarch/float-load.c: Add hard float condition.
* gcc.target/loongarch/flogb.c: Add target { loongarch64*-*-* }
condition.
* gcc.target/loongarch/flt-abi-isa-1.c: Likewise.
* gcc.target/loongarch/flt-abi-isa-2.c: Likewise.
* gcc.target/loongarch/flt-abi-isa-3.c: Likewise.
* gcc.target/loongarch/flt-abi-isa-4.c: Likewise.
* gcc.target/loongarch/frint.c: Likewise.
* gcc.target/loongarch/fscaleb.c: Likewise.
* gcc.target/loongarch/ftint-no-inexact.c: Likewise.
* gcc.target/loongarch/ftint.c: Likewise.
* gcc.target/loongarch/func-call-1.c: Likewise.
* gcc.target/loongarch/func-call-2.c: Likewise.
* gcc.target/loongarch/func-call-3.c: Likewise.
* gcc.target/loongarch/func-call-4.c: Likewise.
* gcc.target/loongarch/func-call-5.c: Likewise.
* gcc.target/loongarch/func-call-6.c: Likewise.
* gcc.target/loongarch/func-call-7.c: Likewise.
* gcc.target/loongarch/func-call-8.c: Likewise.
* gcc.target/loongarch/func-call-extreme-1.c: Likewise.
* gcc.target/loongarch/func-call-extreme-2.c: Likewise.
* gcc.target/loongarch/func-call-extreme-3.c: Likewise.
* gcc.target/loongarch/func-call-extreme-4.c: Likewise.
* gcc.target/loongarch/func-call-extreme-5.c: Likewise.
* gcc.target/loongarch/func-call-extreme-6.c: Likewise.
* gcc.target/loongarch/func-call-medium-1.c: Likewise.
* gcc.target/loongarch/func-call-medium-2.c: Likewise.
* gcc.target/loongarch/func-call-medium-3.c: Likewise.
* gcc.target/loongarch/func-call-medium-5.c: Likewise.
* gcc.target/loongarch/func-call-medium-6.c: Likewise.
* gcc.target/loongarch/func-call-medium-7.c: Likewise.
* gcc.target/loongarch/func-call-medium-8.c: Likewise.
* gcc.target/loongarch/func-call-medium-call36-1.c: Likewise.
* gcc.target/loongarch/func-call-medium-call36.c: Likewise.
* gcc.target/loongarch/imm-load.c: Likewise.
* gcc.target/loongarch/imm-load1.c: Likewise.
* gcc.target/loongarch/invariant-recip.c: Likewise.
* gcc.target/loongarch/larch-builtin.c: Add target { loongarch64*-*-* }
condition and run test_movfcsr2gr if define __loongarch_hard_float.
* gcc.target/loongarch/larch-frecipe-builtin.c: Add target
{ loongarch64*-*-* } condition.
* gcc.target/loongarch/larch-frecipe-intrinsic.c: Likewise.
* gcc.target/loongarch/lasx-func-attr-1.c: Likewise.
* gcc.target/loongarch/lasx-pragma-attr-1.c: Likewise.
* gcc.target/loongarch/lsx-func-attr-1.c: Likewise.
* gcc.target/loongarch/lsx-pragma-attr-1.c: Likewise.
* gcc.target/loongarch/math-float-128.c: Likewise.
* gcc.target/loongarch/memcpy-vec-1.c: Likewise.
* gcc.target/loongarch/memcpy-vec-2.c: Likewise.
* gcc.target/loongarch/memcpy-vec-3.c: Likewise.
* gcc.target/loongarch/mov-zero-2.c: Add hard float condition.
* gcc.target/loongarch/movcf2gr-via-fr.c: Add target { loongarch64*-*-*
}
condition.
* gcc.target/loongarch/movcf2gr.c: Likewise.
* gcc.target/loongarch/mul-const-reduction.c: Likewise.
* gcc.target/loongarch/mulw_d_w.c: Likewise.
* gcc.target/loongarch/mulw_d_wu.c: Likewise.
* gcc.target/loongarch/pr109465-1.c: Likewise.
* gcc.target/loongarch/pr109465-2.c: Likewise.
* gcc.target/loongarch/pr109465-3.c: Likewise.
* gcc.target/loongarch/pr112476-1.c: Likewise.
* gcc.target/loongarch/pr112476-2.c: Likewise.
* gcc.target/loongarch/pr113148.c: Likewise.
* gcc.target/loongarch/pr114861.c: Likewise.
* gcc.target/loongarch/pr115752.c: Add hard float condition.
* gcc.target/loongarch/pr118561.c: Add target { loongarch64*-*-* }
condition.
* gcc.target/loongarch/pr118828-2.c: Likewise.
* gcc.target/loongarch/pr118828-3.c: Likewise.
* gcc.target/loongarch/pr118828-4.c: Likewise.
* gcc.target/loongarch/pr118828.c: Likewise.
* gcc.target/loongarch/pr119127.c: Likewise.
* gcc.target/loongarch/pr121064.c: Reorder the rules.
* gcc.target/loongarch/pr121542.c: Add target { loongarch64*-*-* }
condition.
* gcc.target/loongarch/pr121634.c: Likewise.
* gcc.target/loongarch/pr121875.c: Likewise.
* gcc.target/loongarch/prolog-opt.c: Likewise.
* gcc.target/loongarch/recip-divf.c: Likewise.
* gcc.target/loongarch/recip-sqrtf.c: Likewise.
* gcc.target/loongarch/relocs-symbol-noaddend.c: Likewise.
* gcc.target/loongarch/revb.c: Likewise.
* gcc.target/loongarch/rotl-with-rotr.c: Likewise.
* gcc.target/loongarch/rotrw.c: Likewise.
* gcc.target/loongarch/sign-extend-1.c: Likewise.
* gcc.target/loongarch/sign-extend-2.c: Likewise.
* gcc.target/loongarch/sign-extend-bitwise.c: Likewise.
* gcc.target/loongarch/slt-sign-extend.c: Likewise.
* gcc.target/loongarch/smuldi3_highpart.c: Likewise.
* gcc.target/loongarch/sqrtf.c: Add hard float condition.
* gcc.target/loongarch/switch-qi.c: Add target { loongarch64*-*-* }
condition.
* gcc.target/loongarch/tls-extreme-macro.c: Likewise.
* gcc.target/loongarch/tls-ie-extreme.c: Likewise.
* gcc.target/loongarch/vect-frint-no-inexact.c: Likewise.
* gcc.target/loongarch/vect-frint.c: Likewise.
* gcc.target/loongarch/vect-ftint-no-inexact.c: Likewise.
* gcc.target/loongarch/vect-ftint.c: Likewise.
* gcc.target/loongarch/vect-ld-st-imm12.c: Likewise.
* gcc.target/loongarch/zero-size-field-pass.c: Likewise.
* gcc.target/loongarch/zero-size-field-ret.c: Likewise.
* lib/target-supports.exp: Add hard float condition to
check_effective_target_scalar_all_fma.
Disable loongarch for check_effective_target_vect_cmdline_needed.
Add check_effective_target_loongarch_sx condition to
check_vect_support_and_set_flags.
---
gcc/testsuite/g++.target/loongarch/bytepick.C | 2 +-
gcc/testsuite/g++.target/loongarch/got-load.C | 2 +-
gcc/testsuite/g++.target/loongarch/pr106828.C | 2 +-
.../g++.target/loongarch/vect-ashr-lshr.C | 1 +
gcc/testsuite/gcc.dg/ifcvt-4.c | 2 +-
gcc/testsuite/gcc.dg/stack-usage-1.c | 2 +-
gcc/testsuite/gcc.dg/tree-ssa/gen-vect-2.c | 2 -
gcc/testsuite/gcc.dg/tree-ssa/gen-vect-25.c | 2 -
gcc/testsuite/gcc.dg/tree-ssa/pr83403-1.c | 2 +-
gcc/testsuite/gcc.dg/tree-ssa/pr83403-2.c | 2 +-
.../gcc.target/loongarch/add-const.c | 2 +-
.../gcc.target/loongarch/alsl-cost.c | 2 +-
gcc/testsuite/gcc.target/loongarch/alsl_wu.c | 2 +-
.../gcc.target/loongarch/arch-func-attr-1.c | 2 +-
.../gcc.target/loongarch/arch-pragma-attr-1.c | 2 +-
.../gcc.target/loongarch/bitint-args.c | 14 +++----
.../loongarch/bitwise-shift-reassoc.c | 2 +-
.../gcc.target/loongarch/bitwise_extend.c | 2 +-
.../gcc.target/loongarch/bstrins-1.c | 2 +-
.../gcc.target/loongarch/bstrins-2.c | 2 +-
.../gcc.target/loongarch/bstrins-3.c | 2 +-
.../gcc.target/loongarch/bstrins-4.c | 2 +-
.../loongarch/bstrpick_alsl_paired.c | 2 +-
.../gcc.target/loongarch/bytepick_shift_128.c | 2 +-
.../gcc.target/loongarch/can_inline_1.c | 2 +-
.../gcc.target/loongarch/can_inline_2.c | 2 +-
.../gcc.target/loongarch/can_inline_3.c | 2 +-
.../gcc.target/loongarch/can_inline_4.c | 2 +-
.../gcc.target/loongarch/can_inline_5.c | 2 +-
.../gcc.target/loongarch/can_inline_6.c | 2 +-
.../gcc.target/loongarch/cmodel-extreme-1.c | 2 +-
.../gcc.target/loongarch/cmodel-extreme-2.c | 2 +-
.../gcc.target/loongarch/cmodel-func-attr-1.c | 2 +-
.../loongarch/cmodel-pragma-attr-1.c | 2 +-
gcc/testsuite/gcc.target/loongarch/cmov_ii.c | 4 +-
.../loongarch/conditional-move-opt-1.c | 2 +-
.../loongarch/conditional-move-opt-2.c | 2 +-
gcc/testsuite/gcc.target/loongarch/crc-sext.c | 2 +-
.../gcc.target/loongarch/div-div32.c | 2 +-
.../gcc.target/loongarch/div-no-div32.c | 2 +-
gcc/testsuite/gcc.target/loongarch/divf.c | 1 +
...explicit-relocs-auto-single-load-store-2.c | 2 +-
...-relocs-auto-single-load-store-no-anchor.c | 2 +-
.../explicit-relocs-auto-single-load-store.c | 2 +-
...icit-relocs-medium-call36-auto-tls-ld-gd.c | 2 +-
.../gcc.target/loongarch/fclass-compile.c | 2 +-
.../gcc.target/loongarch/float-load.c | 1 +
gcc/testsuite/gcc.target/loongarch/flogb.c | 2 +-
.../gcc.target/loongarch/flt-abi-isa-1.c | 2 +-
.../gcc.target/loongarch/flt-abi-isa-2.c | 2 +-
.../gcc.target/loongarch/flt-abi-isa-3.c | 2 +-
.../gcc.target/loongarch/flt-abi-isa-4.c | 2 +-
gcc/testsuite/gcc.target/loongarch/frint.c | 2 +-
gcc/testsuite/gcc.target/loongarch/fscaleb.c | 2 +-
.../gcc.target/loongarch/ftint-no-inexact.c | 2 +-
gcc/testsuite/gcc.target/loongarch/ftint.c | 2 +-
.../gcc.target/loongarch/func-call-1.c | 2 +-
.../gcc.target/loongarch/func-call-2.c | 2 +-
.../gcc.target/loongarch/func-call-3.c | 2 +-
.../gcc.target/loongarch/func-call-4.c | 2 +-
.../gcc.target/loongarch/func-call-5.c | 2 +-
.../gcc.target/loongarch/func-call-6.c | 2 +-
.../gcc.target/loongarch/func-call-7.c | 2 +-
.../gcc.target/loongarch/func-call-8.c | 2 +-
.../loongarch/func-call-extreme-1.c | 2 +-
.../loongarch/func-call-extreme-2.c | 2 +-
.../loongarch/func-call-extreme-3.c | 2 +-
.../loongarch/func-call-extreme-4.c | 2 +-
.../loongarch/func-call-extreme-5.c | 2 +-
.../loongarch/func-call-extreme-6.c | 2 +-
.../gcc.target/loongarch/func-call-medium-1.c | 2 +-
.../gcc.target/loongarch/func-call-medium-2.c | 2 +-
.../gcc.target/loongarch/func-call-medium-3.c | 2 +-
.../gcc.target/loongarch/func-call-medium-5.c | 2 +-
.../gcc.target/loongarch/func-call-medium-6.c | 2 +-
.../gcc.target/loongarch/func-call-medium-7.c | 2 +-
.../gcc.target/loongarch/func-call-medium-8.c | 2 +-
.../loongarch/func-call-medium-call36-1.c | 2 +-
.../loongarch/func-call-medium-call36.c | 2 +-
gcc/testsuite/gcc.target/loongarch/imm-load.c | 2 +-
.../gcc.target/loongarch/imm-load1.c | 2 +-
.../gcc.target/loongarch/invariant-recip.c | 2 +-
.../gcc.target/loongarch/larch-builtin.c | 38 ++++++++++---------
.../loongarch/larch-frecipe-builtin.c | 2 +-
.../loongarch/larch-frecipe-intrinsic.c | 2 +-
.../gcc.target/loongarch/lasx-func-attr-1.c | 2 +-
.../gcc.target/loongarch/lasx-pragma-attr-1.c | 2 +-
.../gcc.target/loongarch/lsx-func-attr-1.c | 2 +-
.../gcc.target/loongarch/lsx-pragma-attr-1.c | 2 +-
.../gcc.target/loongarch/math-float-128.c | 2 +-
.../gcc.target/loongarch/memcpy-vec-1.c | 2 +-
.../gcc.target/loongarch/memcpy-vec-2.c | 2 +-
.../gcc.target/loongarch/memcpy-vec-3.c | 2 +-
.../gcc.target/loongarch/mov-zero-2.c | 1 +
.../gcc.target/loongarch/movcf2gr-via-fr.c | 2 +-
gcc/testsuite/gcc.target/loongarch/movcf2gr.c | 2 +-
.../loongarch/mul-const-reduction.c | 2 +-
gcc/testsuite/gcc.target/loongarch/mulw_d_w.c | 2 +-
.../gcc.target/loongarch/mulw_d_wu.c | 2 +-
.../gcc.target/loongarch/pr109465-1.c | 2 +-
.../gcc.target/loongarch/pr109465-2.c | 2 +-
.../gcc.target/loongarch/pr109465-3.c | 2 +-
.../gcc.target/loongarch/pr112476-1.c | 2 +-
.../gcc.target/loongarch/pr112476-2.c | 2 +-
gcc/testsuite/gcc.target/loongarch/pr113148.c | 2 +-
gcc/testsuite/gcc.target/loongarch/pr114861.c | 2 +-
gcc/testsuite/gcc.target/loongarch/pr115752.c | 1 +
gcc/testsuite/gcc.target/loongarch/pr118561.c | 2 +-
.../gcc.target/loongarch/pr118828-2.c | 2 +-
.../gcc.target/loongarch/pr118828-3.c | 2 +-
.../gcc.target/loongarch/pr118828-4.c | 2 +-
gcc/testsuite/gcc.target/loongarch/pr118828.c | 2 +-
gcc/testsuite/gcc.target/loongarch/pr119127.c | 2 +-
gcc/testsuite/gcc.target/loongarch/pr121064.c | 2 +-
gcc/testsuite/gcc.target/loongarch/pr121542.c | 2 +-
gcc/testsuite/gcc.target/loongarch/pr121634.c | 2 +-
gcc/testsuite/gcc.target/loongarch/pr121875.c | 2 +-
.../gcc.target/loongarch/prolog-opt.c | 2 +-
.../gcc.target/loongarch/recip-divf.c | 2 +-
.../gcc.target/loongarch/recip-sqrtf.c | 2 +-
.../loongarch/relocs-symbol-noaddend.c | 2 +-
gcc/testsuite/gcc.target/loongarch/revb.c | 2 +-
.../gcc.target/loongarch/rotl-with-rotr.c | 2 +-
gcc/testsuite/gcc.target/loongarch/rotrw.c | 2 +-
.../gcc.target/loongarch/sign-extend-1.c | 2 +-
.../gcc.target/loongarch/sign-extend-2.c | 2 +-
.../loongarch/sign-extend-bitwise.c | 2 +-
.../gcc.target/loongarch/slt-sign-extend.c | 2 +-
.../gcc.target/loongarch/smuldi3_highpart.c | 2 +-
gcc/testsuite/gcc.target/loongarch/sqrtf.c | 1 +
.../gcc.target/loongarch/switch-qi.c | 2 +-
.../gcc.target/loongarch/tls-extreme-macro.c | 2 +-
.../gcc.target/loongarch/tls-ie-extreme.c | 2 +-
.../loongarch/vect-frint-no-inexact.c | 2 +-
.../gcc.target/loongarch/vect-frint.c | 2 +-
.../loongarch/vect-ftint-no-inexact.c | 8 +---
.../gcc.target/loongarch/vect-ftint.c | 8 +---
.../gcc.target/loongarch/vect-ld-st-imm12.c | 2 +-
.../loongarch/zero-size-field-pass.c | 2 +-
.../loongarch/zero-size-field-ret.c | 2 +-
gcc/testsuite/lib/target-supports.exp | 22 +++++++----
141 files changed, 180 insertions(+), 178 deletions(-)
diff --git a/gcc/testsuite/g++.target/loongarch/bytepick.C
b/gcc/testsuite/g++.target/loongarch/bytepick.C
index a39e2fa65b7..8a3e54d42f9 100644
--- a/gcc/testsuite/g++.target/loongarch/bytepick.C
+++ b/gcc/testsuite/g++.target/loongarch/bytepick.C
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -mabi=lp64d" } */
/* { dg-final { scan-assembler-times "bytepick.w\t\\\$r4,\\\$r5,\\\$r4" 3 } }
*/
/* { dg-final { scan-assembler-times "bytepick.d\t\\\$r4,\\\$r5,\\\$r4" 7 } }
*/
diff --git a/gcc/testsuite/g++.target/loongarch/got-load.C
b/gcc/testsuite/g++.target/loongarch/got-load.C
index 17870176ab4..170cc024fac 100644
--- a/gcc/testsuite/g++.target/loongarch/got-load.C
+++ b/gcc/testsuite/g++.target/loongarch/got-load.C
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O2 -mexplicit-relocs -mcmodel=normal
-fdump-rtl-expand -fno-stack-protector" } */
/* { dg-final { scan-rtl-dump-times "mem/u" 2 "expand" } } */
diff --git a/gcc/testsuite/g++.target/loongarch/pr106828.C
b/gcc/testsuite/g++.target/loongarch/pr106828.C
index 0d13cbbd515..7a770ec559e 100644
--- a/gcc/testsuite/g++.target/loongarch/pr106828.C
+++ b/gcc/testsuite/g++.target/loongarch/pr106828.C
@@ -1,4 +1,4 @@
-/* { dg-do preprocess } */
+/* { dg-do preprocess { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -fsanitize=address" } */
/* Tests whether the compiler supports compile option '-fsanitize=address'. */
diff --git a/gcc/testsuite/g++.target/loongarch/vect-ashr-lshr.C
b/gcc/testsuite/g++.target/loongarch/vect-ashr-lshr.C
index bcef985fae2..f0ceb4db255 100644
--- a/gcc/testsuite/g++.target/loongarch/vect-ashr-lshr.C
+++ b/gcc/testsuite/g++.target/loongarch/vect-ashr-lshr.C
@@ -1,5 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mlasx -O2" } */
+/* { dg-require-effective-target loongarch_asx } */
/* { dg-final { scan-assembler-times "vsrli.b" 2 } } */
/* { dg-final { scan-assembler-times "vsrli.h" 2 } } */
/* { dg-final { scan-assembler-times "vsrli.w" 2 } } */
diff --git a/gcc/testsuite/gcc.dg/ifcvt-4.c b/gcc/testsuite/gcc.dg/ifcvt-4.c
index 2739a8a925b..485352df6e6 100644
--- a/gcc/testsuite/gcc.dg/ifcvt-4.c
+++ b/gcc/testsuite/gcc.dg/ifcvt-4.c
@@ -2,7 +2,7 @@
/* { dg-additional-options "-misel" { target { powerpc*-*-* } } } */
/* { dg-additional-options "-march=z196" { target { s390x-*-* } } } */
/* { dg-additional-options "-mtune-ctrl=^one_if_conv_insn" { target { i?86-*-*
x86_64-*-* } } } */
-/* { dg-skip-if "Multiple set if-conversion not guaranteed on all subtargets"
{ "arm*-*-* avr-*-* cris-*-* hppa*64*-*-* visium-*-*" riscv*-*-* msp430-*-*
pru-*-* } } */
+/* { dg-skip-if "Multiple set if-conversion not guaranteed on all subtargets"
{ "arm*-*-* avr-*-* cris-*-* hppa*64*-*-* visium-*-*" riscv*-*-* msp430-*-*
pru-*-* loongarch32-*-* } } */
/* { dg-skip-if "" { { sparc*-*-* } && { ! sparc_v9 } } } */
/* { dg-skip-if "" { "s390x-*-*" } { "-m31" } } */
diff --git a/gcc/testsuite/gcc.dg/stack-usage-1.c
b/gcc/testsuite/gcc.dg/stack-usage-1.c
index 6b1981391e3..8714c57c197 100644
--- a/gcc/testsuite/gcc.dg/stack-usage-1.c
+++ b/gcc/testsuite/gcc.dg/stack-usage-1.c
@@ -103,7 +103,7 @@
# define SIZE 252
#elif defined (__CRIS__)
# define SIZE 252
-#elif defined (__loongarch_lp64)
+#elif defined (__loongarch__)
# define SIZE 240 /* 256 - 8 bytes for $fp, and 8 bytes for a temp value */
#else
# define SIZE 256
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-2.c
b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-2.c
index 00fc8f01991..15042fc6ddf 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-2.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-2.c
@@ -1,8 +1,6 @@
/* { dg-do run { target vect_cmdline_needed } } */
-/* { dg-do compile { target { loongarch_sx && {! loongarch_sx_hw } } } } */
/* { dg-options "-O2 -fno-tree-loop-distribute-patterns -ftree-vectorize
-fdump-tree-vect-details -fvect-cost-model=dynamic" } */
/* { dg-additional-options "-mno-sse" { target { i?86-*-* x86_64-*-* } } } */
-/* { dg-additional-options "-mlsx" { target { loongarch*-*-* } } } */
#include <stdlib.h>
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-25.c
b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-25.c
index 99d5e6231ff..94709661953 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-25.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-25.c
@@ -1,8 +1,6 @@
/* { dg-do run { target vect_cmdline_needed } } */
-/* { dg-do compile { target { loongarch_sx && {! loongarch_sx_hw } } } } */
/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details
-fvect-cost-model=dynamic" } */
/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details
-fvect-cost-model=dynamic -mno-sse" { target { i?86-*-* x86_64-*-* } } } */
-/* { dg-additional-options "-mlsx" { target { loongarch*-*-* } } } */
#include <stdlib.h>
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr83403-1.c
b/gcc/testsuite/gcc.dg/tree-ssa/pr83403-1.c
index 64f2bbc76fe..62edb8d8fbb 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/pr83403-1.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr83403-1.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-O3 -funroll-loops -fdump-tree-lim2-details" } */
/* { dg-additional-options "--param max-completely-peeled-insns=200" { target
{ s390*-*-* } } } */
-/* { dg-additional-options "--param max-completely-peeled-insns=300" { target
{ arm*-*-* cris-*-* m68k*-*-* } } } */
+/* { dg-additional-options "--param max-completely-peeled-insns=300" { target
{ arm*-*-* cris-*-* loongarch32*-*-* m68k*-*-* } } } */
#define TYPE unsigned int
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr83403-2.c
b/gcc/testsuite/gcc.dg/tree-ssa/pr83403-2.c
index 3f520720ca2..7c830353ea1 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/pr83403-2.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr83403-2.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-O3 -funroll-loops -fdump-tree-lim2-details" } */
/* { dg-additional-options "--param max-completely-peeled-insns=200" { target
{ s390*-*-* } } } */
-/* { dg-additional-options "--param max-completely-peeled-insns=300" { target
{ arm*-*-* cris-*-* m68k*-*-* } } } */
+/* { dg-additional-options "--param max-completely-peeled-insns=300" { target
{ arm*-*-* cris-*-* loongarch32*-*-* m68k*-*-* } } } */
#define TYPE int
diff --git a/gcc/testsuite/gcc.target/loongarch/add-const.c
b/gcc/testsuite/gcc.target/loongarch/add-const.c
index 7b6a7cb92aa..590bcdabc95 100644
--- a/gcc/testsuite/gcc.target/loongarch/add-const.c
+++ b/gcc/testsuite/gcc.target/loongarch/add-const.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O -mabi=lp64d" } */
/* None of these functions should load the const operand into a temp
diff --git a/gcc/testsuite/gcc.target/loongarch/alsl-cost.c
b/gcc/testsuite/gcc.target/loongarch/alsl-cost.c
index a182279015c..16a0f5df780 100644
--- a/gcc/testsuite/gcc.target/loongarch/alsl-cost.c
+++ b/gcc/testsuite/gcc.target/loongarch/alsl-cost.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -mtune=loongarch64" } */
/* { dg-final { scan-assembler-times "alsl\\\.\[wd\]" 2 } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/alsl_wu.c
b/gcc/testsuite/gcc.target/loongarch/alsl_wu.c
index 65f55e629dd..4c8f084575d 100644
--- a/gcc/testsuite/gcc.target/loongarch/alsl_wu.c
+++ b/gcc/testsuite/gcc.target/loongarch/alsl_wu.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-march=loongarch64 -mabi=lp64d -O2" } */
/* { dg-final { scan-assembler "alsl\\.wu" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/arch-func-attr-1.c
b/gcc/testsuite/gcc.target/loongarch/arch-func-attr-1.c
index b8e51e6d9e1..99f186a8ad4 100644
--- a/gcc/testsuite/gcc.target/loongarch/arch-func-attr-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/arch-func-attr-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=loongarch64 -mno-lsx -std=gnu11" } */
extern char a[64];
diff --git a/gcc/testsuite/gcc.target/loongarch/arch-pragma-attr-1.c
b/gcc/testsuite/gcc.target/loongarch/arch-pragma-attr-1.c
index bd918e70926..150832d3c38 100644
--- a/gcc/testsuite/gcc.target/loongarch/arch-pragma-attr-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/arch-pragma-attr-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=loongarch64 -mno-lsx -std=gnu11" } */
#define TEST_TARGET_PRAGMA 1
diff --git a/gcc/testsuite/gcc.target/loongarch/bitint-args.c
b/gcc/testsuite/gcc.target/loongarch/bitint-args.c
index ceba1fb6e3a..e73cd473e6d 100644
--- a/gcc/testsuite/gcc.target/loongarch/bitint-args.c
+++ b/gcc/testsuite/gcc.target/loongarch/bitint-args.c
@@ -36,38 +36,38 @@ CHECK_ARG(16)
CHECK_ARG(19)
/*
** f19:
-** stptr.w \$r5,\$r4,0
+** st(ptr)?.w \$r5,\$r4,0
** jr \$r1
*/
CHECK_ARG(32)
/*
** f32:
-** stptr.w \$r5,\$r4,0
+** st(ptr)?.w \$r5,\$r4,0
** jr \$r1
*/
CHECK_ARG(42)
/*
** f42:
-** stptr.d \$r5,\$r4,0
+** st(ptr)?.d \$r5,\$r4,0
** jr \$r1
*/
CHECK_ARG(64)
/*
** f64:
-** stptr.d \$r5,\$r4,0
+** st(ptr)?.d \$r5,\$r4,0
** jr \$r1
*/
CHECK_ARG(65)
/*
** f65:
-** stptr.d \$r5,\$r4,0
+** st(ptr)?.d \$r5,\$r4,0
** st.d \$r6,\$r4,8
** jr \$r1
*/
CHECK_ARG(127)
/*
** f127:
-** stptr.d \$r5,\$r4,0
+** st(ptr)?.d \$r5,\$r4,0
** st.d \$r6,\$r4,8
** jr \$r1
*/
@@ -75,7 +75,7 @@ CHECK_ARG(127)
CHECK_ARG(128)
/*
** f128:
-** stptr.d \$r5,\$r4,0
+** st(ptr)?.d \$r5,\$r4,0
** st.d \$r6,\$r4,8
** jr \$r1
*/
diff --git a/gcc/testsuite/gcc.target/loongarch/bitwise-shift-reassoc.c
b/gcc/testsuite/gcc.target/loongarch/bitwise-shift-reassoc.c
index 3f197755625..d61699210b8 100644
--- a/gcc/testsuite/gcc.target/loongarch/bitwise-shift-reassoc.c
+++ b/gcc/testsuite/gcc.target/loongarch/bitwise-shift-reassoc.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=loongarch64 -mabi=lp64d" } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/bitwise_extend.c
b/gcc/testsuite/gcc.target/loongarch/bitwise_extend.c
index c2bc489a734..e8ca0f9b7af 100644
--- a/gcc/testsuite/gcc.target/loongarch/bitwise_extend.c
+++ b/gcc/testsuite/gcc.target/loongarch/bitwise_extend.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=loongarch64 -mdiv32" } */
/* { dg-final { scan-assembler-not "slli\\.w" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/bstrins-1.c
b/gcc/testsuite/gcc.target/loongarch/bstrins-1.c
index 7cb3a952322..1deecc0b9ca 100644
--- a/gcc/testsuite/gcc.target/loongarch/bstrins-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/bstrins-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=loongarch64 -mabi=lp64d" } */
/* { dg-final { scan-assembler "bstrins\\.d\t\\\$r4,\\\$r0,4,0" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/bstrins-2.c
b/gcc/testsuite/gcc.target/loongarch/bstrins-2.c
index 9777f502e5a..e0b71a62d07 100644
--- a/gcc/testsuite/gcc.target/loongarch/bstrins-2.c
+++ b/gcc/testsuite/gcc.target/loongarch/bstrins-2.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=loongarch64 -mabi=lp64d" } */
/* { dg-final { scan-assembler "bstrins\\.d\t\\\$r\[0-9\]+,\\\$r0,4,0" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/bstrins-3.c
b/gcc/testsuite/gcc.target/loongarch/bstrins-3.c
index 13762bdef42..1378662f593 100644
--- a/gcc/testsuite/gcc.target/loongarch/bstrins-3.c
+++ b/gcc/testsuite/gcc.target/loongarch/bstrins-3.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -fdump-rtl-final" } */
/* { dg-final { scan-rtl-dump-times "insv\[sd\]i" 2 "final" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/bstrins-4.c
b/gcc/testsuite/gcc.target/loongarch/bstrins-4.c
index 0823cfc386e..d13f06ca85b 100644
--- a/gcc/testsuite/gcc.target/loongarch/bstrins-4.c
+++ b/gcc/testsuite/gcc.target/loongarch/bstrins-4.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=loongarch64 -mabi=lp64d" } */
/* { dg-final { scan-assembler "bstrins\\.d\t\\\$r4,\\\$r0,2,2" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/bstrpick_alsl_paired.c
b/gcc/testsuite/gcc.target/loongarch/bstrpick_alsl_paired.c
index 900e8c9e19f..94eb7763e1d 100644
--- a/gcc/testsuite/gcc.target/loongarch/bstrpick_alsl_paired.c
+++ b/gcc/testsuite/gcc.target/loongarch/bstrpick_alsl_paired.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O2 -fdump-rtl-combine" } */
/* { dg-final { scan-rtl-dump "{and_shift_reversedi}" "combine" } } */
/* { dg-final { scan-assembler-not
"alsl.d\t\\\$r\[0-9\]+,\\\$r\[0-9\]+,\\\$r0" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/bytepick_shift_128.c
b/gcc/testsuite/gcc.target/loongarch/bytepick_shift_128.c
index d3a97721906..5a28973cbd8 100644
--- a/gcc/testsuite/gcc.target/loongarch/bytepick_shift_128.c
+++ b/gcc/testsuite/gcc.target/loongarch/bytepick_shift_128.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=loongarch64 -mabi=lp64d" } */
/* { dg-final { scan-assembler "bytepick\\.d" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/can_inline_1.c
b/gcc/testsuite/gcc.target/loongarch/can_inline_1.c
index a1726d7f089..1e7c6eb6afe 100644
--- a/gcc/testsuite/gcc.target/loongarch/can_inline_1.c
+++ b/gcc/testsuite/gcc.target/loongarch/can_inline_1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-march=loongarch64 -mabi=lp64d -fdump-tree-einline-details
-O2" } */
/* { dg-final { scan-tree-dump {missed: not inlinable: bar/\d+ -> foo/\d+,
target specific option mismatch} "einline" } } */
/* { dg-final { scan-tree-dump-not {\(inlined\)} "einline" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/can_inline_2.c
b/gcc/testsuite/gcc.target/loongarch/can_inline_2.c
index 0d77aca6c76..cbad9ddfad8 100644
--- a/gcc/testsuite/gcc.target/loongarch/can_inline_2.c
+++ b/gcc/testsuite/gcc.target/loongarch/can_inline_2.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-march=loongarch64 -mabi=lp64d -fdump-tree-einline-details
-O2" } */
/* { dg-final { scan-tree-dump {missed: not inlinable: bar/\d+ -> foo/\d+,
target specific option mismatch} "einline" } } */
/* { dg-final { scan-tree-dump-not {\(inlined\)} "einline" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/can_inline_3.c
b/gcc/testsuite/gcc.target/loongarch/can_inline_3.c
index d11dc4707fb..3f5fc928b8b 100644
--- a/gcc/testsuite/gcc.target/loongarch/can_inline_3.c
+++ b/gcc/testsuite/gcc.target/loongarch/can_inline_3.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-march=loongarch64 -mabi=lp64d -fdump-tree-einline-details
-O2" } */
/* { dg-final { scan-tree-dump {missed: not inlinable: bar/\d+ -> foo/\d+,
target specific option mismatch} "einline" } } */
/* { dg-final { scan-tree-dump-not {\(inlined\)} "einline" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/can_inline_4.c
b/gcc/testsuite/gcc.target/loongarch/can_inline_4.c
index 6274ff10a7f..3904690035a 100644
--- a/gcc/testsuite/gcc.target/loongarch/can_inline_4.c
+++ b/gcc/testsuite/gcc.target/loongarch/can_inline_4.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-march=loongarch64 -mabi=lp64d -fdump-tree-einline-details
-O2" } */
/* { dg-final { scan-tree-dump {missed: not inlinable: bar/\d+ -> foo/\d+,
target specific option mismatch} "einline" } } */
/* { dg-final { scan-tree-dump-not {\(inlined\)} "einline" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/can_inline_5.c
b/gcc/testsuite/gcc.target/loongarch/can_inline_5.c
index 88550268e97..27a4b58a15e 100644
--- a/gcc/testsuite/gcc.target/loongarch/can_inline_5.c
+++ b/gcc/testsuite/gcc.target/loongarch/can_inline_5.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-march=loongarch64 -mabi=lp64d -fdump-tree-einline-details
-O2" } */
/* { dg-final { scan-tree-dump {\(inlined\)} "einline" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/can_inline_6.c
b/gcc/testsuite/gcc.target/loongarch/can_inline_6.c
index b700de263a3..62782076783 100644
--- a/gcc/testsuite/gcc.target/loongarch/can_inline_6.c
+++ b/gcc/testsuite/gcc.target/loongarch/can_inline_6.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-march=loongarch64 -mabi=lp64d -fdump-tree-einline-details
-O2" } */
/* { dg-final { scan-tree-dump {missed: not inlinable: bar/\d+ -> foo/\d+,
target specific option mismatch} "einline" } } */
/* { dg-final { scan-tree-dump-not {\(inlined\)} "einline" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/cmodel-extreme-1.c
b/gcc/testsuite/gcc.target/loongarch/cmodel-extreme-1.c
index 4fad516f057..828ed95538e 100644
--- a/gcc/testsuite/gcc.target/loongarch/cmodel-extreme-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/cmodel-extreme-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-march=loongarch64 -mabi=lp64d -O2 -mcmodel=extreme
-mtls-dialect=trad -fno-plt -mexplicit-relocs=always -fdump-rtl-final -fPIC" }
*/
int a;
diff --git a/gcc/testsuite/gcc.target/loongarch/cmodel-extreme-2.c
b/gcc/testsuite/gcc.target/loongarch/cmodel-extreme-2.c
index 49bc6583914..6d33573f1af 100644
--- a/gcc/testsuite/gcc.target/loongarch/cmodel-extreme-2.c
+++ b/gcc/testsuite/gcc.target/loongarch/cmodel-extreme-2.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-march=loongarch64 -mabi=lp64d -O2 -mcmodel=extreme
-mtls-dialect=trad -fno-plt -mexplicit-relocs=auto -fdump-rtl-final -fPIC" } */
#include "cmodel-extreme-1.c"
diff --git a/gcc/testsuite/gcc.target/loongarch/cmodel-func-attr-1.c
b/gcc/testsuite/gcc.target/loongarch/cmodel-func-attr-1.c
index 9f44dc66bfd..a70f2e85543 100644
--- a/gcc/testsuite/gcc.target/loongarch/cmodel-func-attr-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/cmodel-func-attr-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -mcmodel=normal -mexplicit-relocs=none" } */
extern char a[8];
diff --git a/gcc/testsuite/gcc.target/loongarch/cmodel-pragma-attr-1.c
b/gcc/testsuite/gcc.target/loongarch/cmodel-pragma-attr-1.c
index b522891487c..e19e66957fd 100644
--- a/gcc/testsuite/gcc.target/loongarch/cmodel-pragma-attr-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/cmodel-pragma-attr-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -mcmodel=normal -mexplicit-relocs=none" } */
#define TEST_TARGET_PRAGMA 1
diff --git a/gcc/testsuite/gcc.target/loongarch/cmov_ii.c
b/gcc/testsuite/gcc.target/loongarch/cmov_ii.c
index 21b468e8ae1..70290064670 100644
--- a/gcc/testsuite/gcc.target/loongarch/cmov_ii.c
+++ b/gcc/testsuite/gcc.target/loongarch/cmov_ii.c
@@ -1,6 +1,6 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2" } */
-/* { dg-final { scan-assembler "test:.*xor.*maskeqz.*masknez.*or.*" } } */
+/* { dg-final { scan-assembler
"test:.*xor.*(maskeqz.*masknez|masknez.*maskeqz).*or.*" } } */
extern void foo_ii (int *, int *, int *, int *);
diff --git a/gcc/testsuite/gcc.target/loongarch/conditional-move-opt-1.c
b/gcc/testsuite/gcc.target/loongarch/conditional-move-opt-1.c
index 47802aa9688..031f2ed3766 100644
--- a/gcc/testsuite/gcc.target/loongarch/conditional-move-opt-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/conditional-move-opt-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2" } */
/* { dg-final { scan-assembler-not "maskeqz" } } */
/* { dg-final { scan-assembler-not "masknez" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/conditional-move-opt-2.c
b/gcc/testsuite/gcc.target/loongarch/conditional-move-opt-2.c
index 743fd5e670e..22dfeb4b458 100644
--- a/gcc/testsuite/gcc.target/loongarch/conditional-move-opt-2.c
+++ b/gcc/testsuite/gcc.target/loongarch/conditional-move-opt-2.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 --param max-rtl-if-conversion-insns=1" } */
/* { dg-final { scan-assembler-not "maskeqz" } } */
/* { dg-final { scan-assembler-not "masknez" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/crc-sext.c
b/gcc/testsuite/gcc.target/loongarch/crc-sext.c
index 9ade5a8e4ca..b319d688bbe 100644
--- a/gcc/testsuite/gcc.target/loongarch/crc-sext.c
+++ b/gcc/testsuite/gcc.target/loongarch/crc-sext.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=loongarch64" } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/div-div32.c
b/gcc/testsuite/gcc.target/loongarch/div-div32.c
index 8b1f686eca2..b5a33700319 100644
--- a/gcc/testsuite/gcc.target/loongarch/div-div32.c
+++ b/gcc/testsuite/gcc.target/loongarch/div-div32.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=loongarch64 -mabi=lp64d -mdiv32" } */
/* { dg-final { scan-assembler "div\.w" } } */
/* { dg-final { scan-assembler "div\.wu" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/div-no-div32.c
b/gcc/testsuite/gcc.target/loongarch/div-no-div32.c
index f0f697ba589..bc8ab0c5e6e 100644
--- a/gcc/testsuite/gcc.target/loongarch/div-no-div32.c
+++ b/gcc/testsuite/gcc.target/loongarch/div-no-div32.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=loongarch64 -mabi=lp64d" } */
/* { dg-final { scan-assembler "div\.w" } } */
/* { dg-final { scan-assembler "div\.wu" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/divf.c
b/gcc/testsuite/gcc.target/loongarch/divf.c
index 6c831817c9e..90e61b90049 100644
--- a/gcc/testsuite/gcc.target/loongarch/divf.c
+++ b/gcc/testsuite/gcc.target/loongarch/divf.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target hard_float } */
/* { dg-options "-O2 -ffast-math -mrecip -mfrecipe
-fno-unsafe-math-optimizations" } */
/* { dg-final { scan-assembler "fdiv.s" } } */
/* { dg-final { scan-assembler-not "frecipe.s" } } */
diff --git
a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-auto-single-load-store-2.c
b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-auto-single-load-store-2.c
index 42cb966d1e0..9e2e7e09fc8 100644
---
a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-auto-single-load-store-2.c
+++
b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-auto-single-load-store-2.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=loongarch64 -mabi=lp64d -mexplicit-relocs=auto" }
*/
float a[8001];
diff --git
a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-auto-single-load-store-no-anchor.c
b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-auto-single-load-store-no-anchor.c
index fb03403d756..dd5b0798944 100644
---
a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-auto-single-load-store-no-anchor.c
+++
b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-auto-single-load-store-no-anchor.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=loongarch64 -mabi=lp64d -mexplicit-relocs=auto
-fno-section-anchors" } */
#include "explicit-relocs-auto-single-load-store.c"
diff --git
a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-auto-single-load-store.c
b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-auto-single-load-store.c
index 0d53644cda7..80b18901dbc 100644
---
a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-auto-single-load-store.c
+++
b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-auto-single-load-store.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=loongarch64 -mabi=lp64d -mexplicit-relocs=auto" }
*/
long a;
diff --git
a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-medium-call36-auto-tls-ld-gd.c
b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-medium-call36-auto-tls-ld-gd.c
index cfb8553236a..4f0d82021a7 100644
---
a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-medium-call36-auto-tls-ld-gd.c
+++
b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-medium-call36-auto-tls-ld-gd.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -fPIC -mexplicit-relocs=auto -mtls-dialect=trad
-mcmodel=medium -fplt" } */
/* { dg-final { scan-assembler
"pcaddu18i\t\\\$r1,%call36\\\(__tls_get_addr\\\)" { target { tls_native &&
loongarch_call36_support } } } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/fclass-compile.c
b/gcc/testsuite/gcc.target/loongarch/fclass-compile.c
index 3db83e7b31d..999bfe7e94f 100644
--- a/gcc/testsuite/gcc.target/loongarch/fclass-compile.c
+++ b/gcc/testsuite/gcc.target/loongarch/fclass-compile.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -fsignaling-nans -march=loongarch64 -mfpu=64 -mabi=lp64d"
} */
/* { dg-final { scan-assembler-times "fclass\\.s" 1 } } */
/* { dg-final { scan-assembler-times "fclass\\.d" 1 } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/float-load.c
b/gcc/testsuite/gcc.target/loongarch/float-load.c
index c757a795e21..2a7550cc5e0 100644
--- a/gcc/testsuite/gcc.target/loongarch/float-load.c
+++ b/gcc/testsuite/gcc.target/loongarch/float-load.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target hard_float } */
/* { dg-options "-O2" } */
/* { dg-final { scan-assembler "fld\\.s" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/flogb.c
b/gcc/testsuite/gcc.target/loongarch/flogb.c
index 1daefe54e13..156b5be29ca 100644
--- a/gcc/testsuite/gcc.target/loongarch/flogb.c
+++ b/gcc/testsuite/gcc.target/loongarch/flogb.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mdouble-float -fno-math-errno" } */
/* { dg-final { scan-assembler "fabs\\.s" } } */
/* { dg-final { scan-assembler "fabs\\.d" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/flt-abi-isa-1.c
b/gcc/testsuite/gcc.target/loongarch/flt-abi-isa-1.c
index 1c9490f6a87..14640c0bbb8 100644
--- a/gcc/testsuite/gcc.target/loongarch/flt-abi-isa-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/flt-abi-isa-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -mfpu=64 -march=loongarch64 -O2" } */
/* { dg-final { scan-assembler "frecip\\.d" } } */
/* { dg-final { scan-assembler-not "movgr2fr\\.d" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/flt-abi-isa-2.c
b/gcc/testsuite/gcc.target/loongarch/flt-abi-isa-2.c
index 0580fd65d3a..dd7f66a4d5a 100644
--- a/gcc/testsuite/gcc.target/loongarch/flt-abi-isa-2.c
+++ b/gcc/testsuite/gcc.target/loongarch/flt-abi-isa-2.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64s -mfpu=64 -march=loongarch64 -O2" } */
/* { dg-final { scan-assembler "frecip\\.d" } } */
/* { dg-final { scan-assembler "movgr2fr\\.d" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/flt-abi-isa-3.c
b/gcc/testsuite/gcc.target/loongarch/flt-abi-isa-3.c
index 16a926f57a1..58e8f39c5cf 100644
--- a/gcc/testsuite/gcc.target/loongarch/flt-abi-isa-3.c
+++ b/gcc/testsuite/gcc.target/loongarch/flt-abi-isa-3.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64s -mfpu=none -march=loongarch64 -O2" } */
/* { dg-final { scan-assembler-not "frecip\\.d" } } */
/* { dg-final { scan-assembler-not "movgr2fr\\.d" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/flt-abi-isa-4.c
b/gcc/testsuite/gcc.target/loongarch/flt-abi-isa-4.c
index 43b579c3fac..07a4444644c 100644
--- a/gcc/testsuite/gcc.target/loongarch/flt-abi-isa-4.c
+++ b/gcc/testsuite/gcc.target/loongarch/flt-abi-isa-4.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-msoft-float -march=loongarch64 -O2" } */
/* { dg-final { scan-assembler-not "frecip\\.d" } } */
/* { dg-final { scan-assembler-not "movgr2fr\\.d" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/frint.c
b/gcc/testsuite/gcc.target/loongarch/frint.c
index 3ee6a8f973a..c9a3aac511f 100644
--- a/gcc/testsuite/gcc.target/loongarch/frint.c
+++ b/gcc/testsuite/gcc.target/loongarch/frint.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mdouble-float" } */
/* { dg-final { scan-assembler "frint\\.s" } } */
/* { dg-final { scan-assembler "frint\\.d" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/fscaleb.c
b/gcc/testsuite/gcc.target/loongarch/fscaleb.c
index f18470fbb8f..3ef44c74371 100644
--- a/gcc/testsuite/gcc.target/loongarch/fscaleb.c
+++ b/gcc/testsuite/gcc.target/loongarch/fscaleb.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -mabi=lp64d -mdouble-float -fno-math-errno" } */
/* { dg-final { scan-assembler-times "fscaleb\\.s" 3 } } */
/* { dg-final { scan-assembler-times "fscaleb\\.d" 4 } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/ftint-no-inexact.c
b/gcc/testsuite/gcc.target/loongarch/ftint-no-inexact.c
index 88b83a9c056..d027d7f663b 100644
--- a/gcc/testsuite/gcc.target/loongarch/ftint-no-inexact.c
+++ b/gcc/testsuite/gcc.target/loongarch/ftint-no-inexact.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -mdouble-float -fno-math-errno
-fno-fp-int-builtin-inexact" } */
/* { dg-final { scan-assembler "ftint\\.l\\.s" } } */
/* { dg-final { scan-assembler "ftint\\.l\\.d" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/ftint.c
b/gcc/testsuite/gcc.target/loongarch/ftint.c
index 7a326a454d8..9eedbedebca 100644
--- a/gcc/testsuite/gcc.target/loongarch/ftint.c
+++ b/gcc/testsuite/gcc.target/loongarch/ftint.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -mdouble-float -fno-math-errno
-ffp-int-builtin-inexact" } */
/* { dg-final { scan-assembler "ftint\\.l\\.s" } } */
/* { dg-final { scan-assembler "ftint\\.l\\.d" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-1.c
b/gcc/testsuite/gcc.target/loongarch/func-call-1.c
index 76bf11b0c03..be5a0085992 100644
--- a/gcc/testsuite/gcc.target/loongarch/func-call-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/func-call-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O0 -fpic -fplt -mno-explicit-relocs
-mcmodel=normal" } */
/* { dg-final { scan-assembler "test:.*bl\t%plt\\(g\\)\n" } } */
/* { dg-final { scan-assembler "test1:.*bl\t%plt\\(f\\)\n" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-2.c
b/gcc/testsuite/gcc.target/loongarch/func-call-2.c
index 4b468fef8b4..e21b0d1397f 100644
--- a/gcc/testsuite/gcc.target/loongarch/func-call-2.c
+++ b/gcc/testsuite/gcc.target/loongarch/func-call-2.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O0 -fno-pic -fplt -mno-explicit-relocs
-mcmodel=normal" } */
/* { dg-final { scan-assembler "test:.*bl\t%plt\\(g\\)\n" } } */
/* { dg-final { scan-assembler "test1:.*bl\tf\n" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-3.c
b/gcc/testsuite/gcc.target/loongarch/func-call-3.c
index dd3a4882d60..db8943fe088 100644
--- a/gcc/testsuite/gcc.target/loongarch/func-call-3.c
+++ b/gcc/testsuite/gcc.target/loongarch/func-call-3.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O0 -fpic -fno-plt -mno-explicit-relocs
-mcmodel=normal" } */
/* { dg-final { scan-assembler "test:.*la\.global\t.*g\n\tjirl" } } */
/* { dg-final { scan-assembler "test1:.*la\.global\t.*f\n\tjirl" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-4.c
b/gcc/testsuite/gcc.target/loongarch/func-call-4.c
index f8158ec349f..d08d3a54483 100644
--- a/gcc/testsuite/gcc.target/loongarch/func-call-4.c
+++ b/gcc/testsuite/gcc.target/loongarch/func-call-4.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O0 -fno-pic -fno-plt -mno-explicit-relocs
-mcmodel=normal" } */
/* { dg-final { scan-assembler "test:.*la\.global\t.*g\n\tjirl" } } */
/* { dg-final { scan-assembler "test1:.*bl\tf\n" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-5.c
b/gcc/testsuite/gcc.target/loongarch/func-call-5.c
index 37994af430d..e50891f4d11 100644
--- a/gcc/testsuite/gcc.target/loongarch/func-call-5.c
+++ b/gcc/testsuite/gcc.target/loongarch/func-call-5.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O0 -fpic -fplt -mexplicit-relocs
-mcmodel=normal" } */
/* { dg-final { scan-assembler "test:.*bl\t%plt\\(g\\)\n" } } */
/* { dg-final { scan-assembler "test1:.*bl\t%plt\\(f\\)\n" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-6.c
b/gcc/testsuite/gcc.target/loongarch/func-call-6.c
index 8e366e376e7..f1a2c58f494 100644
--- a/gcc/testsuite/gcc.target/loongarch/func-call-6.c
+++ b/gcc/testsuite/gcc.target/loongarch/func-call-6.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O0 -fno-pic -fplt -mexplicit-relocs
-mcmodel=normal" } */
/* { dg-final { scan-assembler "test:.*bl\t%plt\\(g\\)\n" } } */
/* { dg-final { scan-assembler "test1:.*bl\tf\n" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-7.c
b/gcc/testsuite/gcc.target/loongarch/func-call-7.c
index 4177c3d962e..cda61059897 100644
--- a/gcc/testsuite/gcc.target/loongarch/func-call-7.c
+++ b/gcc/testsuite/gcc.target/loongarch/func-call-7.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O0 -fpic -fno-plt -mexplicit-relocs
-mcmodel=normal" } */
/* { dg-final { scan-assembler
"test:.*pcalau12i\t.*%got_pc_hi20\\(g\\)\n\tld\.d\t.*%got_pc_lo12\\(g\\)\n\tjirl"
} } */
/* { dg-final { scan-assembler
"test1:.*pcalau12i\t.*%got_pc_hi20\\(f\\)\n\tld\.d\t.*%got_pc_lo12\\(f\\)\n\tjirl"
} } */
diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-8.c
b/gcc/testsuite/gcc.target/loongarch/func-call-8.c
index 4254eaa16d4..06faf175f32 100644
--- a/gcc/testsuite/gcc.target/loongarch/func-call-8.c
+++ b/gcc/testsuite/gcc.target/loongarch/func-call-8.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O0 -fno-pic -fno-plt -mexplicit-relocs
-mcmodel=normal" } */
/* { dg-final { scan-assembler
"test:.*pcalau12i\t.*%got_pc_hi20\\(g\\)\n\tld\.d\t.*%got_pc_lo12\\(g\\)\n\tjirl"
} } */
/* { dg-final { scan-assembler "test1:.*bl\tf\n" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-extreme-1.c
b/gcc/testsuite/gcc.target/loongarch/func-call-extreme-1.c
index fdb4cf1ff7f..3c23be30005 100644
--- a/gcc/testsuite/gcc.target/loongarch/func-call-extreme-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/func-call-extreme-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O2 -fno-pic -fno-plt -mexplicit-relocs
-mcmodel=extreme" } */
/* { dg-final { scan-assembler
"test:.*pcalau12i.*%got_pc_hi20.*\n\taddi\.d.*%got_pc_lo12.*\n\tlu32i\.d.*%got64_pc_lo20.*\n\tlu52i\.d.*%got64_pc_hi12.*\n\tldx\.d"
} } */
/* { dg-final { scan-assembler
"test1:.*pcalau12i.*%pc_hi20.*\n\taddi\.d.*%pc_lo12.*\n\tlu32i\.d.*%pc64_lo20.*\n\tlu52i\.d.*pc64_hi12.*\n\tadd\.d"
} } */
diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-extreme-2.c
b/gcc/testsuite/gcc.target/loongarch/func-call-extreme-2.c
index dfba3882b97..a1354109622 100644
--- a/gcc/testsuite/gcc.target/loongarch/func-call-extreme-2.c
+++ b/gcc/testsuite/gcc.target/loongarch/func-call-extreme-2.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O2 -fpic -fno-plt -mexplicit-relocs
-mcmodel=extreme" } */
/* { dg-final { scan-assembler
"test:.*pcalau12i.*%got_pc_hi20.*\n\taddi\.d.*%got_pc_lo12.*\n\tlu32i\.d.*%got64_pc_lo20.*\n\tlu52i\.d.*%got64_pc_hi12.*\n\tldx\.d"
} } */
/* { dg-final { scan-assembler
"test1:.*pcalau12i.*%got_pc_hi20.*\n\taddi\.d.*%got_pc_lo12.*\n\tlu32i\.d.*%got64_pc_lo20.*\n\tlu52i\.d.*%got64_pc_hi12.*\n\tldx\.d"
} } */
diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-extreme-3.c
b/gcc/testsuite/gcc.target/loongarch/func-call-extreme-3.c
index 1f5234f83d1..cc968b803aa 100644
--- a/gcc/testsuite/gcc.target/loongarch/func-call-extreme-3.c
+++ b/gcc/testsuite/gcc.target/loongarch/func-call-extreme-3.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O2 -fno-pic -fno-plt -mexplicit-relocs=auto
-mcmodel=extreme" } */
/* { dg-final { scan-assembler
"test:.*pcalau12i.*%got_pc_hi20.*\n\taddi\.d.*%got_pc_lo12.*\n\tlu32i\.d.*%got64_pc_lo20.*\n\tlu52i\.d.*%got64_pc_hi12.*\n\tldx\.d"
} } */
/* { dg-final { scan-assembler
"test1:.*pcalau12i.*%pc_hi20.*\n\taddi\.d.*%pc_lo12.*\n\tlu32i\.d.*%pc64_lo20.*\n\tlu52i\.d.*pc64_hi12.*\n\tadd\.d"
} } */
diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-extreme-4.c
b/gcc/testsuite/gcc.target/loongarch/func-call-extreme-4.c
index c4228500635..70a0a5690cf 100644
--- a/gcc/testsuite/gcc.target/loongarch/func-call-extreme-4.c
+++ b/gcc/testsuite/gcc.target/loongarch/func-call-extreme-4.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O2 -fpic -fno-plt -mexplicit-relocs=auto
-mcmodel=extreme" } */
/* { dg-final { scan-assembler
"test:.*pcalau12i.*%got_pc_hi20.*\n\taddi\.d.*%got_pc_lo12.*\n\tlu32i\.d.*%got64_pc_lo20.*\n\tlu52i\.d.*%got64_pc_hi12.*\n\tldx\.d"
} } */
/* { dg-final { scan-assembler
"test1:.*pcalau12i.*%got_pc_hi20.*\n\taddi\.d.*%got_pc_lo12.*\n\tlu32i\.d.*%got64_pc_lo20.*\n\tlu52i\.d.*%got64_pc_hi12.*\n\tldx\.d"
} } */
diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-extreme-5.c
b/gcc/testsuite/gcc.target/loongarch/func-call-extreme-5.c
index b1bd9d236ea..27100355cae 100644
--- a/gcc/testsuite/gcc.target/loongarch/func-call-extreme-5.c
+++ b/gcc/testsuite/gcc.target/loongarch/func-call-extreme-5.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O0 -fpic -fno-plt -mexplicit-relocs=none
-mcmodel=extreme" } */
/* { dg-final { scan-assembler
"test:.*la.global\t\\\$r\[0-9\]+,\\\$r\[0-9\]+,g" } } */
/* { dg-final { scan-assembler
"test1:.*la.global\t\\\$r\[0-9\]+,\\\$r\[0-9\]+,f" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-extreme-6.c
b/gcc/testsuite/gcc.target/loongarch/func-call-extreme-6.c
index 6e6ad5c9f5c..3539f3483e5 100644
--- a/gcc/testsuite/gcc.target/loongarch/func-call-extreme-6.c
+++ b/gcc/testsuite/gcc.target/loongarch/func-call-extreme-6.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O0 -fno-pic -fno-plt -mexplicit-relocs=none
-mcmodel=extreme" } */
/* { dg-final { scan-assembler
"test:.*la.global\t\\\$r\[0-9\]+,\\\$r\[0-9\]+,g" } } */
/* { dg-final { scan-assembler
"test1:.*la.local\t\\\$r\[0-9\]+,\\\$r\[0-9\]+,f" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-medium-1.c
b/gcc/testsuite/gcc.target/loongarch/func-call-medium-1.c
index 5e81df55207..8f89ee4f3c8 100644
--- a/gcc/testsuite/gcc.target/loongarch/func-call-medium-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/func-call-medium-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O0 -fpic -fplt -mno-explicit-relocs
-mtls-dialect=trad -mcmodel=medium" } */
/* { dg-final { scan-assembler "test:.*la\.global\t.*g\n\tjirl" } } */
/* { dg-final { scan-assembler "test1:.*la\.global\t.*f\n\tjirl" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-medium-2.c
b/gcc/testsuite/gcc.target/loongarch/func-call-medium-2.c
index e97044a6013..9c3782dcb64 100644
--- a/gcc/testsuite/gcc.target/loongarch/func-call-medium-2.c
+++ b/gcc/testsuite/gcc.target/loongarch/func-call-medium-2.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O2 -fno-pic -fplt -mno-explicit-relocs
-mtls-dialect=trad -mcmodel=medium" } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-medium-3.c
b/gcc/testsuite/gcc.target/loongarch/func-call-medium-3.c
index 8754fc6ef30..29cef95ddc4 100644
--- a/gcc/testsuite/gcc.target/loongarch/func-call-medium-3.c
+++ b/gcc/testsuite/gcc.target/loongarch/func-call-medium-3.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O2 -fpic -fno-plt -mno-explicit-relocs
-mtls-dialect=trad -mcmodel=medium" } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-medium-5.c
b/gcc/testsuite/gcc.target/loongarch/func-call-medium-5.c
index cae880bd80c..ec348a94976 100644
--- a/gcc/testsuite/gcc.target/loongarch/func-call-medium-5.c
+++ b/gcc/testsuite/gcc.target/loongarch/func-call-medium-5.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-skip-if "dg-require-effective-target loongarch_call36_support" { *-*-*
} } */
/* { dg-options "-mabi=lp64d -O0 -fpic -fplt -mexplicit-relocs
-mcmodel=medium" } */
/* { dg-final { scan-assembler
"test:.*pcalau12i.*%pc_hi20\\(g\\)\n\tjirl.*pc_lo12\\(g\\)" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-medium-6.c
b/gcc/testsuite/gcc.target/loongarch/func-call-medium-6.c
index 33819542d83..6dc899f8d4d 100644
--- a/gcc/testsuite/gcc.target/loongarch/func-call-medium-6.c
+++ b/gcc/testsuite/gcc.target/loongarch/func-call-medium-6.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-skip-if "dg-require-effective-target loongarch_call36_support" { *-*-*
} } */
/* { dg-options "-mabi=lp64d -O0 -fno-pic -fplt -mexplicit-relocs
-mcmodel=medium" } */
/* { dg-final { scan-assembler
"test:.*pcalau12i.*%pc_hi20\\(g\\)\n\tjirl.*pc_lo12\\(g\\)" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-medium-7.c
b/gcc/testsuite/gcc.target/loongarch/func-call-medium-7.c
index 969b59d043e..228408eb635 100644
--- a/gcc/testsuite/gcc.target/loongarch/func-call-medium-7.c
+++ b/gcc/testsuite/gcc.target/loongarch/func-call-medium-7.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-skip-if "dg-require-effective-target loongarch_call36_support" { *-*-*
} } */
/* { dg-options "-mabi=lp64d -O0 -fpic -fno-plt -mexplicit-relocs
-mcmodel=medium" } */
/* { dg-final { scan-assembler
"test:.*pcalau12i\t.*%got_pc_hi20\\(g\\)\n\tld\.d\t.*%got_pc_lo12\\(g\\)\n\tjirl"
} } */
diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-medium-8.c
b/gcc/testsuite/gcc.target/loongarch/func-call-medium-8.c
index 786ff395f0b..c22677abc20 100644
--- a/gcc/testsuite/gcc.target/loongarch/func-call-medium-8.c
+++ b/gcc/testsuite/gcc.target/loongarch/func-call-medium-8.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-skip-if "dg-require-effective-target loongarch_call36_support" { *-*-*
} } */
/* { dg-options "-mabi=lp64d -O0 -fno-pic -fno-plt -mexplicit-relocs
-mcmodel=medium" } */
/* { dg-final { scan-assembler
"test:.*pcalau12i\t.*%got_pc_hi20\\(g\\)\n\tld\.d\t.*%got_pc_lo12\\(g\\)\n\tjirl"
} } */
diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-medium-call36-1.c
b/gcc/testsuite/gcc.target/loongarch/func-call-medium-call36-1.c
index 872ff32f825..600356ef286 100644
--- a/gcc/testsuite/gcc.target/loongarch/func-call-medium-call36-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/func-call-medium-call36-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-require-effective-target loongarch_call36_support } */
/* { dg-options "-mcmodel=medium -mexplicit-relocs -fdump-rtl-final -O2" } */
/* { dg-final { scan-assembler "test:.*pcaddu18i\t\\\$r1,%call36\\(func\\)" }
} */
diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-medium-call36.c
b/gcc/testsuite/gcc.target/loongarch/func-call-medium-call36.c
index 98ccd260df5..2d6813d869e 100644
--- a/gcc/testsuite/gcc.target/loongarch/func-call-medium-call36.c
+++ b/gcc/testsuite/gcc.target/loongarch/func-call-medium-call36.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-require-effective-target loongarch_call36_support } */
/* { dg-options "-mcmodel=medium -mexplicit-relocs -fdump-rtl-final -O2" } */
/* { dg-final { scan-rtl-dump-times "\\(clobber \\(reg:DI 12 \\\$r12\\)\\)" 3
"final" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/imm-load.c
b/gcc/testsuite/gcc.target/loongarch/imm-load.c
index a125840d507..7839341da92 100644
--- a/gcc/testsuite/gcc.target/loongarch/imm-load.c
+++ b/gcc/testsuite/gcc.target/loongarch/imm-load.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O2 -fdump-rtl-split1" } */
/* { dg-final { scan-assembler-not "test:.*>>.*test" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/imm-load1.c
b/gcc/testsuite/gcc.target/loongarch/imm-load1.c
index f64cc2956a3..d818b211025 100644
--- a/gcc/testsuite/gcc.target/loongarch/imm-load1.c
+++ b/gcc/testsuite/gcc.target/loongarch/imm-load1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O2" } */
/* { dg-final { scan-assembler-not "test:.*lu52i\.d.*\n\taddi\.w.*\n\.L2:" } }
*/
/* { dg-final { scan-assembler "test:.*lu12i\.w.*\n\tbstrins\.d.*\n\.L2:" } }
*/
diff --git a/gcc/testsuite/gcc.target/loongarch/invariant-recip.c
b/gcc/testsuite/gcc.target/loongarch/invariant-recip.c
index 2f64f6ed5e5..ad4150d16f6 100644
--- a/gcc/testsuite/gcc.target/loongarch/invariant-recip.c
+++ b/gcc/testsuite/gcc.target/loongarch/invariant-recip.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-Ofast -march=loongarch64 -mabi=lp64d -mrecip -mfrecipe
-fdump-rtl-loop2_invariant " } */
/* { dg-final { scan-rtl-dump "Decided to move dependent invariant"
"loop2_invariant" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/larch-builtin.c
b/gcc/testsuite/gcc.target/loongarch/larch-builtin.c
index e937da269ae..3655915533a 100644
--- a/gcc/testsuite/gcc.target/loongarch/larch-builtin.c
+++ b/gcc/testsuite/gcc.target/loongarch/larch-builtin.c
@@ -5,21 +5,21 @@
/* { dg-final { scan-assembler-times "test_rdtime_d:.*rdtime\\.d.*\\.size
test_rdtime_d" 1 { target { loongarch64*-*-* } } } } */
/* { dg-final { scan-assembler-times "test_rdtimeh_w:.*rdtimeh\\.w.*\\.size
test_rdtimeh_w" 1 } } */
/* { dg-final { scan-assembler-times "test_rdtimel_w:.*rdtimel\\.w.*\\.size
test_rdtimel_w" 1 } } */
-/* { dg-final { scan-assembler-times "test_movfcsr2gr:.*movfcsr2gr.*\\.size
test_movfcsr2gr" 1 } } */
-/* { dg-final { scan-assembler-times "test_movgr2fcsr:.*movgr2fcsr.*\\.size
test_movgr2fcsr" 1 } } */
+/* { dg-final { scan-assembler-times "test_movfcsr2gr:.*movfcsr2gr.*\\.size
test_movfcsr2gr" 1 { target { loongarch64*-*-* } } } } */
+/* { dg-final { scan-assembler-times "test_movgr2fcsr:.*movgr2fcsr.*\\.size
test_movgr2fcsr" 1 { target { loongarch64*-*-* } } } } */
/* { dg-final { scan-assembler-times "test_cacop_d:.*cacop.*\\.size
test_cacop_d" 1 { target { loongarch64*-*-* } } } } */
/* { dg-final { scan-assembler-times "test_cpucfg:.*cpucfg.*\\.size
test_cpucfg" 1 } } */
/* { dg-final { scan-assembler-times "test_asrtle_d:.*asrtle\\.d.*\\.size
test_asrtle_d" 1 { target { loongarch64*-*-* } } } } */
/* { dg-final { scan-assembler-times "test_asrtgt_d:.*asrtgt\\.d.*\\.size
test_asrtgt_d" 1 { target { loongarch64*-*-* } } } } */
/* { dg-final { scan-assembler-times "test_lddir_d:.*lddir.*\\.size
test_lddir_d" 1 { target { loongarch64*-*-* } } } } */
/* { dg-final { scan-assembler-times "test_ldpte_d:.*ldpte.*\\.size
test_ldpte_d" 1 { target { loongarch64*-*-* } } } } */
-/* { dg-final { scan-assembler-times
"test_crc_w_b_w:.*crc\\.w\\.b\\.w.*\\.size test_crc_w_b_w" 1 } } */
-/* { dg-final { scan-assembler-times
"test_crc_w_h_w:.*crc\\.w\\.h\\.w.*\\.size test_crc_w_h_w" 1 } } */
-/* { dg-final { scan-assembler-times
"test_crc_w_w_w:.*crc\\.w\\.w\\.w.*\\.size test_crc_w_w_w" 1 } } */
+/* { dg-final { scan-assembler-times
"test_crc_w_b_w:.*crc\\.w\\.b\\.w.*\\.size test_crc_w_b_w" 1 { target {
loongarch64*-*-* } } } } */
+/* { dg-final { scan-assembler-times
"test_crc_w_h_w:.*crc\\.w\\.h\\.w.*\\.size test_crc_w_h_w" 1 { target {
loongarch64*-*-* } } } } */
+/* { dg-final { scan-assembler-times
"test_crc_w_w_w:.*crc\\.w\\.w\\.w.*\\.size test_crc_w_w_w" 1 { target {
loongarch64*-*-* } } } } */
/* { dg-final { scan-assembler-times
"test_crc_w_d_w:.*crc\\.w\\.d\\.w.*\\.size test_crc_w_d_w" 1 { target {
loongarch64*-*-* } } } } */
-/* { dg-final { scan-assembler-times
"test_crcc_w_b_w:.*crcc\\.w\\.b\\.w.*\\.size test_crcc_w_b_w" 1 } } */
-/* { dg-final { scan-assembler-times
"test_crcc_w_h_w:.*crcc\\.w\\.h\\.w.*\\.size test_crcc_w_h_w" 1 } } */
-/* { dg-final { scan-assembler-times
"test_crcc_w_w_w:.*crcc\\.w\\.w\\.w.*\\.size test_crcc_w_w_w" 1 } } */
+/* { dg-final { scan-assembler-times
"test_crcc_w_b_w:.*crcc\\.w\\.b\\.w.*\\.size test_crcc_w_b_w" 1 { target {
loongarch64*-*-* } } } } */
+/* { dg-final { scan-assembler-times
"test_crcc_w_h_w:.*crcc\\.w\\.h\\.w.*\\.size test_crcc_w_h_w" 1 { target {
loongarch64*-*-* } } } } */
+/* { dg-final { scan-assembler-times
"test_crcc_w_w_w:.*crcc\\.w\\.w\\.w.*\\.size test_crcc_w_w_w" 1 { target {
loongarch64*-*-* } } } } */
/* { dg-final { scan-assembler-times
"test_crcc_w_d_w:.*crcc\\.w\\.d\\.w.*\\.size test_crcc_w_d_w" 1 { target {
loongarch64*-*-* } } } } */
/* { dg-final { scan-assembler-times "test_csrrd_w:.*csrrd.*\\.size
test_csrrd_w" 1 } } */
/* { dg-final { scan-assembler-times "test_csrwr_w:.*csrwr.*\\.size
test_csrwr_w" 1 } } */
@@ -27,13 +27,13 @@
/* { dg-final { scan-assembler-times "test_csrrd_d:.*csrrd.*\\.size
test_csrrd_d" 1 { target { loongarch64*-*-* } } } } */
/* { dg-final { scan-assembler-times "test_csrwr_d:.*csrwr.*\\.size
test_csrwr_d" 1 { target { loongarch64*-*-* } } } } */
/* { dg-final { scan-assembler-times "test_csrxchg_d:.*csrxchg.*\\.size
test_csrxchg_d" 1 { target { loongarch64*-*-* } } } } */
-/* { dg-final { scan-assembler-times "test_iocsrrd_b:.*iocsrrd\\.b.*\\.size
test_iocsrrd_b" 1 } } */
-/* { dg-final { scan-assembler-times "test_iocsrrd_h:.*iocsrrd\\.h.*\\.size
test_iocsrrd_h" 1 } } */
-/* { dg-final { scan-assembler-times "test_iocsrrd_w:.*iocsrrd\\.w.*\\.size
test_iocsrrd_w" 1 } } */
+/* { dg-final { scan-assembler-times "test_iocsrrd_b:.*iocsrrd\\.b.*\\.size
test_iocsrrd_b" 1 { target { loongarch64*-*-* } } } } */
+/* { dg-final { scan-assembler-times "test_iocsrrd_h:.*iocsrrd\\.h.*\\.size
test_iocsrrd_h" 1 { target { loongarch64*-*-* } } } } */
+/* { dg-final { scan-assembler-times "test_iocsrrd_w:.*iocsrrd\\.w.*\\.size
test_iocsrrd_w" 1 { target { loongarch64*-*-* } } } } */
/* { dg-final { scan-assembler-times "test_iocsrrd_d:.*iocsrrd\\.d.*\\.size
test_iocsrrd_d" 1 { target { loongarch64*-*-* } } } } */
-/* { dg-final { scan-assembler-times "test_iocsrwr_b:.*iocsrwr\\.b.*\\.size
test_iocsrwr_b" 1 } } */
-/* { dg-final { scan-assembler-times "test_iocsrwr_h:.*iocsrwr\\.h.*\\.size
test_iocsrwr_h" 1 } } */
-/* { dg-final { scan-assembler-times "test_iocsrwr_w:.*iocsrwr\\.w.*\\.size
test_iocsrwr_w" 1 } } */
+/* { dg-final { scan-assembler-times "test_iocsrwr_b:.*iocsrwr\\.b.*\\.size
test_iocsrwr_b" 1 { target { loongarch64*-*-* } } } } */
+/* { dg-final { scan-assembler-times "test_iocsrwr_h:.*iocsrwr\\.h.*\\.size
test_iocsrwr_h" 1 { target { loongarch64*-*-* } } } } */
+/* { dg-final { scan-assembler-times "test_iocsrwr_w:.*iocsrwr\\.w.*\\.size
test_iocsrwr_w" 1 { target { loongarch64*-*-* } } } } */
/* { dg-final { scan-assembler-times "test_iocsrwr_d:.*iocsrwr\\.d.*\\.size
test_iocsrwr_d" 1 { target { loongarch64*-*-* } } } } */
/* { dg-final { scan-assembler-times "test_dbar:.*dbar.*\\.size
test_dbar" 1 } } */
/* { dg-final { scan-assembler-times "test_ibar:.*ibar.*\\.size
test_ibar" 1 } } */
@@ -62,6 +62,7 @@ test_rdtimel_w ()
return __rdtimel_w ();
}
+#ifdef __loongarch_hard_float
unsigned int
test_movfcsr2gr ()
{
@@ -73,6 +74,7 @@ test_movgr2fcsr (unsigned int _1)
{
__movgr2fcsr (1, _1);
}
+#endif
#ifdef __loongarch64
void
@@ -112,7 +114,6 @@ test_ldpte_d (long int _1)
{
__ldpte_d (_1, 1);
}
-#endif
int
test_crc_w_b_w (char _1, int _2)
@@ -132,13 +133,11 @@ test_crc_w_w_w (int _1, int _2)
return __crc_w_w_w (_1, _2);
}
-#ifdef __loongarch64
int
test_crc_w_d_w (long int _1, int _2)
{
return __crc_w_d_w (_1, _2);
}
-#endif
int
test_crcc_w_b_w (char _1, int _2)
@@ -158,7 +157,6 @@ test_crcc_w_w_w (int _1, int _2)
return __crcc_w_w_w (_1, _2);
}
-#ifdef __loongarch64
int
test_crcc_w_d_w (long int _1, int _2)
{
@@ -204,6 +202,7 @@ test_csrxchg_d (unsigned long int _1, unsigned long int _2)
}
#endif
+#ifdef __loongarch64
unsigned char
test_iocsrrd_b (unsigned int _1)
{
@@ -221,6 +220,7 @@ test_iocsrrd_w (unsigned int _1)
{
return __iocsrrd_w (_1);
}
+#endif
#ifdef __loongarch64
unsigned long int
@@ -230,6 +230,7 @@ test_iocsrrd_d (unsigned int _1)
}
#endif
+#ifdef __loongarch64
void
test_iocsrwr_b (unsigned char _1, unsigned int _2)
{
@@ -247,6 +248,7 @@ test_iocsrwr_w (unsigned int _1, unsigned int _2)
{
__iocsrwr_w (_1, _2);
}
+#endif
#ifdef __loongarch64
void
diff --git a/gcc/testsuite/gcc.target/loongarch/larch-frecipe-builtin.c
b/gcc/testsuite/gcc.target/loongarch/larch-frecipe-builtin.c
index b9329f34676..6d85f6cdc91 100644
--- a/gcc/testsuite/gcc.target/loongarch/larch-frecipe-builtin.c
+++ b/gcc/testsuite/gcc.target/loongarch/larch-frecipe-builtin.c
@@ -1,5 +1,5 @@
/* Test builtins for frecipe.{s/d} and frsqrte.{s/d} instructions */
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mfrecipe" } */
/* { dg-final { scan-assembler-times
"test_frecipe_s:.*frecipe\\.s.*test_frecipe_s" 1 } } */
/* { dg-final { scan-assembler-times
"test_frecipe_d:.*frecipe\\.d.*test_frecipe_d" 1 } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/larch-frecipe-intrinsic.c
b/gcc/testsuite/gcc.target/loongarch/larch-frecipe-intrinsic.c
index 6ce2bde0acf..4f9aa5427ea 100644
--- a/gcc/testsuite/gcc.target/loongarch/larch-frecipe-intrinsic.c
+++ b/gcc/testsuite/gcc.target/loongarch/larch-frecipe-intrinsic.c
@@ -1,5 +1,5 @@
/* Test intrinsics for frecipe.{s/d} and frsqrte.{s/d} instructions */
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mfrecipe -O2" } */
/* { dg-final { scan-assembler-times
"test_frecipe_s:.*frecipe\\.s.*test_frecipe_s" 1 } } */
/* { dg-final { scan-assembler-times
"test_frecipe_d:.*frecipe\\.d.*test_frecipe_d" 1 } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/lasx-func-attr-1.c
b/gcc/testsuite/gcc.target/loongarch/lasx-func-attr-1.c
index 720719e80b8..566d8522acb 100644
--- a/gcc/testsuite/gcc.target/loongarch/lasx-func-attr-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/lasx-func-attr-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -mno-lsx" } */
typedef int v8i32 __attribute__ ((vector_size(32), aligned(32)));
diff --git a/gcc/testsuite/gcc.target/loongarch/lasx-pragma-attr-1.c
b/gcc/testsuite/gcc.target/loongarch/lasx-pragma-attr-1.c
index d5bc68f1cb8..9498d896a67 100644
--- a/gcc/testsuite/gcc.target/loongarch/lasx-pragma-attr-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/lasx-pragma-attr-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -mno-lsx" } */
#define TEST_TARGET_PRAGMA 1
diff --git a/gcc/testsuite/gcc.target/loongarch/lsx-func-attr-1.c
b/gcc/testsuite/gcc.target/loongarch/lsx-func-attr-1.c
index 3558898d353..91b4b12e3a8 100644
--- a/gcc/testsuite/gcc.target/loongarch/lsx-func-attr-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/lsx-func-attr-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -mno-lsx" } */
typedef int v4i32 __attribute__ ((vector_size(16), aligned(16)));
diff --git a/gcc/testsuite/gcc.target/loongarch/lsx-pragma-attr-1.c
b/gcc/testsuite/gcc.target/loongarch/lsx-pragma-attr-1.c
index c499f18fc42..5c256fb62e7 100644
--- a/gcc/testsuite/gcc.target/loongarch/lsx-pragma-attr-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/lsx-pragma-attr-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -mno-lsx" } */
#define TEST_TARGET_PRAGMA 1
diff --git a/gcc/testsuite/gcc.target/loongarch/math-float-128.c
b/gcc/testsuite/gcc.target/loongarch/math-float-128.c
index 387566a57c9..bdf2ab44b8f 100644
--- a/gcc/testsuite/gcc.target/loongarch/math-float-128.c
+++ b/gcc/testsuite/gcc.target/loongarch/math-float-128.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options " -march=loongarch64 -O2 " } */
/* { dg-final { scan-assembler-not
"my_fabsq2:.*\\bl\t%plt\\(__builtin_fabsq\\).*my_fabsq2" } } */
/* { dg-final { scan-assembler-not
"my_copysignq2:.*\\bl\t%plt\\(__builtin_copysignq\\).*my_copysignq2" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/memcpy-vec-1.c
b/gcc/testsuite/gcc.target/loongarch/memcpy-vec-1.c
index 8d9fedc9e4f..cc8be913fe4 100644
--- a/gcc/testsuite/gcc.target/loongarch/memcpy-vec-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/memcpy-vec-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -mabi=lp64d -march=la464 -mno-strict-align" } */
/* { dg-final { scan-assembler-times "xvst" 2 } } */
/* { dg-final { scan-assembler-times "\tvst" 1 } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/memcpy-vec-2.c
b/gcc/testsuite/gcc.target/loongarch/memcpy-vec-2.c
index 6b28b884db0..bc883aba228 100644
--- a/gcc/testsuite/gcc.target/loongarch/memcpy-vec-2.c
+++ b/gcc/testsuite/gcc.target/loongarch/memcpy-vec-2.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -mabi=lp64d -march=la464 -mno-strict-align" } */
/* { dg-final { scan-assembler-times "xvst" 2 } } */
/* { dg-final { scan-assembler-times "\tvst" 1 } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/memcpy-vec-3.c
b/gcc/testsuite/gcc.target/loongarch/memcpy-vec-3.c
index db2ea510b09..84ccede909f 100644
--- a/gcc/testsuite/gcc.target/loongarch/memcpy-vec-3.c
+++ b/gcc/testsuite/gcc.target/loongarch/memcpy-vec-3.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=la464 -mabi=lp64d -mstrict-align" } */
/* { dg-final { scan-assembler-not "vst" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/mov-zero-2.c
b/gcc/testsuite/gcc.target/loongarch/mov-zero-2.c
index aeaf418f2a2..ece331b2261 100644
--- a/gcc/testsuite/gcc.target/loongarch/mov-zero-2.c
+++ b/gcc/testsuite/gcc.target/loongarch/mov-zero-2.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target hard_float } */
/* { dg-options "-O2 -mno-lsx" } */
/* { dg-final { scan-assembler-times "movgr2fr" 2 { target loongarch64*-*-* }
} } */
/* { dg-final { scan-assembler-times "movgr2fr" 3 { target loongarch32*-*-* }
} } */
diff --git a/gcc/testsuite/gcc.target/loongarch/movcf2gr-via-fr.c
b/gcc/testsuite/gcc.target/loongarch/movcf2gr-via-fr.c
index 23334a3a31f..48416f8fc4e 100644
--- a/gcc/testsuite/gcc.target/loongarch/movcf2gr-via-fr.c
+++ b/gcc/testsuite/gcc.target/loongarch/movcf2gr-via-fr.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=loongarch64 -mtune=la464 -mabi=lp64d" } */
/* { dg-final { scan-assembler "movcf2fr\t\\\$f\[0-9\]+,\\\$fcc" } } */
/* { dg-final { scan-assembler "movfr2gr\\.s\t\\\$r4" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/movcf2gr.c
b/gcc/testsuite/gcc.target/loongarch/movcf2gr.c
index d27c393b5ed..1c1c4fec740 100644
--- a/gcc/testsuite/gcc.target/loongarch/movcf2gr.c
+++ b/gcc/testsuite/gcc.target/loongarch/movcf2gr.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=loongarch64 -mtune=la664 -mabi=lp64d" } */
/* { dg-final { scan-assembler "movcf2gr\t\\\$r4,\\\$fcc" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/mul-const-reduction.c
b/gcc/testsuite/gcc.target/loongarch/mul-const-reduction.c
index 02d9a4876d8..8c8e263643a 100644
--- a/gcc/testsuite/gcc.target/loongarch/mul-const-reduction.c
+++ b/gcc/testsuite/gcc.target/loongarch/mul-const-reduction.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -mtune=la464" } */
/* { dg-final { scan-assembler "alsl\.w" } } */
/* { dg-final { scan-assembler "slli\.w" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/mulw_d_w.c
b/gcc/testsuite/gcc.target/loongarch/mulw_d_w.c
index 4ab7df8836b..67cf624f815 100644
--- a/gcc/testsuite/gcc.target/loongarch/mulw_d_w.c
+++ b/gcc/testsuite/gcc.target/loongarch/mulw_d_w.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -mabi=lp64d" } */
/* { dg-final { scan-assembler "mulw.d.w" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/mulw_d_wu.c
b/gcc/testsuite/gcc.target/loongarch/mulw_d_wu.c
index 16163d6675d..aec2b238161 100644
--- a/gcc/testsuite/gcc.target/loongarch/mulw_d_wu.c
+++ b/gcc/testsuite/gcc.target/loongarch/mulw_d_wu.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -mabi=lp64d" } */
/* { dg-final { scan-assembler "mulw.d.wu" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/pr109465-1.c
b/gcc/testsuite/gcc.target/loongarch/pr109465-1.c
index 4cd35d13904..7c1f97b31ec 100644
--- a/gcc/testsuite/gcc.target/loongarch/pr109465-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/pr109465-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -mabi=lp64d -mno-strict-align" } */
/* { dg-final { scan-assembler-times "st\\.d|stptr\\.d" 1 } } */
/* { dg-final { scan-assembler-times "st\\.w|stptr\\.w" 1 } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/pr109465-2.c
b/gcc/testsuite/gcc.target/loongarch/pr109465-2.c
index 703eb951c6d..80cb8168e1f 100644
--- a/gcc/testsuite/gcc.target/loongarch/pr109465-2.c
+++ b/gcc/testsuite/gcc.target/loongarch/pr109465-2.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -mabi=lp64d -mstrict-align" } */
/* { dg-final { scan-assembler-times "st\\.d|stptr\\.d" 1 } } */
/* { dg-final { scan-assembler-times "st\\.w|stptr\\.w" 1 } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/pr109465-3.c
b/gcc/testsuite/gcc.target/loongarch/pr109465-3.c
index d6a80659b31..87fd5f40421 100644
--- a/gcc/testsuite/gcc.target/loongarch/pr109465-3.c
+++ b/gcc/testsuite/gcc.target/loongarch/pr109465-3.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -mabi=lp64d -mstrict-align" } */
/* Three loop iterations each contains 4 st.b, and 3 st.b after the loop */
diff --git a/gcc/testsuite/gcc.target/loongarch/pr112476-1.c
b/gcc/testsuite/gcc.target/loongarch/pr112476-1.c
index 96951d688c1..57b2830d41a 100644
--- a/gcc/testsuite/gcc.target/loongarch/pr112476-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/pr112476-1.c
@@ -1,5 +1,5 @@
/* PR target/112476: ICE with -mlsx */
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-require-effective-target loongarch_sx } */
/* { dg-options "-O2 -march=loongarch64 -mfpu=64 -mabi=lp64d -mlsx" } */
diff --git a/gcc/testsuite/gcc.target/loongarch/pr112476-2.c
b/gcc/testsuite/gcc.target/loongarch/pr112476-2.c
index 7abdd9a0dbb..90ecc5d7e51 100644
--- a/gcc/testsuite/gcc.target/loongarch/pr112476-2.c
+++ b/gcc/testsuite/gcc.target/loongarch/pr112476-2.c
@@ -1,5 +1,5 @@
/* PR target/112476: ICE with -mlasx */
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -march=loongarch64 -mfpu=64 -mabi=lp64d -mlasx" } */
diff --git a/gcc/testsuite/gcc.target/loongarch/pr113148.c
b/gcc/testsuite/gcc.target/loongarch/pr113148.c
index cf48e552053..27c8aafb185 100644
--- a/gcc/testsuite/gcc.target/loongarch/pr113148.c
+++ b/gcc/testsuite/gcc.target/loongarch/pr113148.c
@@ -1,5 +1,5 @@
/* PR 113148: ICE caused by infinite reloading */
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=la464 -mfpu=64 -mabi=lp64d" } */
struct bound
diff --git a/gcc/testsuite/gcc.target/loongarch/pr114861.c
b/gcc/testsuite/gcc.target/loongarch/pr114861.c
index e6507c406b9..56301a8555f 100644
--- a/gcc/testsuite/gcc.target/loongarch/pr114861.c
+++ b/gcc/testsuite/gcc.target/loongarch/pr114861.c
@@ -1,6 +1,6 @@
/* PR114861: ICE building the kernel with -Os
Reduced from linux/fs/ntfs3/attrib.c at revision c942a0cd3603. */
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-Os -march=loongarch64 -msoft-float -mabi=lp64s" } */
long evcn, attr_collapse_range_vbo, attr_collapse_range_bytes;
diff --git a/gcc/testsuite/gcc.target/loongarch/pr115752.c
b/gcc/testsuite/gcc.target/loongarch/pr115752.c
index df4bae524f7..dac5a7fb13d 100644
--- a/gcc/testsuite/gcc.target/loongarch/pr115752.c
+++ b/gcc/testsuite/gcc.target/loongarch/pr115752.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target hard_float } */
long double
test (long double xx)
diff --git a/gcc/testsuite/gcc.target/loongarch/pr118561.c
b/gcc/testsuite/gcc.target/loongarch/pr118561.c
index 81a776eada3..c948cefb2e7 100644
--- a/gcc/testsuite/gcc.target/loongarch/pr118561.c
+++ b/gcc/testsuite/gcc.target/loongarch/pr118561.c
@@ -1,5 +1,5 @@
/* PR target/118561: ICE with -mfpu=none */
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=loongarch64 -mfpu=none" } */
int
diff --git a/gcc/testsuite/gcc.target/loongarch/pr118828-2.c
b/gcc/testsuite/gcc.target/loongarch/pr118828-2.c
index 3d32fcc15c9..a69f7a52d98 100644
--- a/gcc/testsuite/gcc.target/loongarch/pr118828-2.c
+++ b/gcc/testsuite/gcc.target/loongarch/pr118828-2.c
@@ -1,4 +1,4 @@
-/* { dg-do preprocess } */
+/* { dg-do preprocess { target { loongarch64*-*-* } } } */
/* { dg-options "-mno-lsx" } */
#ifdef __loongarch_sx
diff --git a/gcc/testsuite/gcc.target/loongarch/pr118828-3.c
b/gcc/testsuite/gcc.target/loongarch/pr118828-3.c
index 31ab8e59a3f..9a237c8aea5 100644
--- a/gcc/testsuite/gcc.target/loongarch/pr118828-3.c
+++ b/gcc/testsuite/gcc.target/loongarch/pr118828-3.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=loongarch64" } */
/* { dg-final { scan-assembler "t1: loongarch64" } } */
/* { dg-final { scan-assembler "t2: la64v1.1" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/pr118828-4.c
b/gcc/testsuite/gcc.target/loongarch/pr118828-4.c
index 77587ee5614..f79e7b68801 100644
--- a/gcc/testsuite/gcc.target/loongarch/pr118828-4.c
+++ b/gcc/testsuite/gcc.target/loongarch/pr118828-4.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=loongarch64 -mtune=la464" } */
/* { dg-final { scan-assembler "t1: la464" } } */
/* { dg-final { scan-assembler "t2: la664" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/pr118828.c
b/gcc/testsuite/gcc.target/loongarch/pr118828.c
index abdda24c758..b7c7389710f 100644
--- a/gcc/testsuite/gcc.target/loongarch/pr118828.c
+++ b/gcc/testsuite/gcc.target/loongarch/pr118828.c
@@ -1,4 +1,4 @@
-/* { dg-do preprocess } */
+/* { dg-do preprocess { target { loongarch64*-*-* } } } */
/* { dg-options "-mno-lasx" } */
#ifdef __loongarch_asx
diff --git a/gcc/testsuite/gcc.target/loongarch/pr119127.c
b/gcc/testsuite/gcc.target/loongarch/pr119127.c
index 4e253beb0f4..143fc12be79 100644
--- a/gcc/testsuite/gcc.target/loongarch/pr119127.c
+++ b/gcc/testsuite/gcc.target/loongarch/pr119127.c
@@ -1,5 +1,5 @@
/* PR target/119127: ICE caused by operating DImode const in SImode */
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=loongarch64 -mabi=lp64d" } */
int x;
diff --git a/gcc/testsuite/gcc.target/loongarch/pr121064.c
b/gcc/testsuite/gcc.target/loongarch/pr121064.c
index a466c7abc70..7d63c25faef 100644
--- a/gcc/testsuite/gcc.target/loongarch/pr121064.c
+++ b/gcc/testsuite/gcc.target/loongarch/pr121064.c
@@ -1,5 +1,5 @@
-/* { dg-require-effective-target loongarch_sx_hw } */
/* { dg-do run } */
+/* { dg-require-effective-target loongarch_sx_hw } */
/* { dg-options "-march=loongarch64 -mfpu=64 -mlsx -O3" } */
typedef __INT32_TYPE__ int32_t;
diff --git a/gcc/testsuite/gcc.target/loongarch/pr121542.c
b/gcc/testsuite/gcc.target/loongarch/pr121542.c
index 51a5e3c4480..fd2dbefe3d9 100644
--- a/gcc/testsuite/gcc.target/loongarch/pr121542.c
+++ b/gcc/testsuite/gcc.target/loongarch/pr121542.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mrecip=all -mfrecipe -mabi=lp64d -march=loongarch64
-mfpu=64 -msimd=lasx -Ofast" } */
typedef long unsigned int STRLEN;
diff --git a/gcc/testsuite/gcc.target/loongarch/pr121634.c
b/gcc/testsuite/gcc.target/loongarch/pr121634.c
index 325173ad798..0b14baa3d3a 100644
--- a/gcc/testsuite/gcc.target/loongarch/pr121634.c
+++ b/gcc/testsuite/gcc.target/loongarch/pr121634.c
@@ -1,5 +1,5 @@
/* PR target/121634: ICE in highway-1.3.0 testsuite */
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=la464 -mabi=lp64d" } */
typedef short v8i16 __attribute__ ((vector_size (16)));
diff --git a/gcc/testsuite/gcc.target/loongarch/pr121875.c
b/gcc/testsuite/gcc.target/loongarch/pr121875.c
index f0a42ba020a..976689b6341 100644
--- a/gcc/testsuite/gcc.target/loongarch/pr121875.c
+++ b/gcc/testsuite/gcc.target/loongarch/pr121875.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-march=loongarch64 -mabi=lp64d -O2" } */
[[gnu::always_inline]] inline void f() {}
diff --git a/gcc/testsuite/gcc.target/loongarch/prolog-opt.c
b/gcc/testsuite/gcc.target/loongarch/prolog-opt.c
index e6a64263384..a9e78c63da3 100644
--- a/gcc/testsuite/gcc.target/loongarch/prolog-opt.c
+++ b/gcc/testsuite/gcc.target/loongarch/prolog-opt.c
@@ -1,6 +1,6 @@
/* Test that LoongArch backend stack drop operation optimized. */
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -mabi=lp64d -fno-stack-protector" } */
/* { dg-final { scan-assembler "addi.d\t\\\$r3,\\\$r3,-16" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/recip-divf.c
b/gcc/testsuite/gcc.target/loongarch/recip-divf.c
index db5e3e48888..27f62bfad25 100644
--- a/gcc/testsuite/gcc.target/loongarch/recip-divf.c
+++ b/gcc/testsuite/gcc.target/loongarch/recip-divf.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -ffast-math -mrecip -mfrecipe" } */
/* { dg-final { scan-assembler "frecipe.s" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/recip-sqrtf.c
b/gcc/testsuite/gcc.target/loongarch/recip-sqrtf.c
index 7f45db6cdea..52d48c1b17b 100644
--- a/gcc/testsuite/gcc.target/loongarch/recip-sqrtf.c
+++ b/gcc/testsuite/gcc.target/loongarch/recip-sqrtf.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -ffast-math -mrecip -mfrecipe" } */
/* { dg-final { scan-assembler-times "frsqrte.s" 3 } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/relocs-symbol-noaddend.c
b/gcc/testsuite/gcc.target/loongarch/relocs-symbol-noaddend.c
index 3ec8bd229fd..680e8cafc48 100644
--- a/gcc/testsuite/gcc.target/loongarch/relocs-symbol-noaddend.c
+++ b/gcc/testsuite/gcc.target/loongarch/relocs-symbol-noaddend.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -mexplicit-relocs -fno-pic -O2 -mcmodel=normal" }
*/
/* { dg-final { scan-assembler "pcalau12i.*%pc_hi20\\(\.LANCHOR0\\)\n" } } */
/* { dg-final { scan-assembler "addi\.d.*%pc_lo12\\(\.LANCHOR0\\)\n" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/revb.c
b/gcc/testsuite/gcc.target/loongarch/revb.c
index 27a5d0fc7b7..9d55c4442c9 100644
--- a/gcc/testsuite/gcc.target/loongarch/revb.c
+++ b/gcc/testsuite/gcc.target/loongarch/revb.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=loongarch64 -mabi=lp64d" } */
/* { dg-final { check-function-bodies "**" "" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/rotl-with-rotr.c
b/gcc/testsuite/gcc.target/loongarch/rotl-with-rotr.c
index 84cc53cecaf..4779766b773 100644
--- a/gcc/testsuite/gcc.target/loongarch/rotl-with-rotr.c
+++ b/gcc/testsuite/gcc.target/loongarch/rotl-with-rotr.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2" } */
/* { dg-final { scan-assembler "rotr\\.w" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/rotrw.c
b/gcc/testsuite/gcc.target/loongarch/rotrw.c
index 6ed45e8b86c..72bab5a7c28 100644
--- a/gcc/testsuite/gcc.target/loongarch/rotrw.c
+++ b/gcc/testsuite/gcc.target/loongarch/rotrw.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2" } */
/* { dg-final { scan-assembler "rotr\\.w\t\\\$r4,\\\$r4,\\\$r5" } } */
/* { dg-final { scan-assembler "rotri\\.w\t\\\$r4,\\\$r4,5" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/sign-extend-1.c
b/gcc/testsuite/gcc.target/loongarch/sign-extend-1.c
index 3f339d06bbd..a9460bcfa73 100644
--- a/gcc/testsuite/gcc.target/loongarch/sign-extend-1.c
+++ b/gcc/testsuite/gcc.target/loongarch/sign-extend-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O2" } */
/* { dg-final { scan-assembler-times "slli.w" 1 } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/sign-extend-2.c
b/gcc/testsuite/gcc.target/loongarch/sign-extend-2.c
index e57a2727d0c..f466ffff87f 100644
--- a/gcc/testsuite/gcc.target/loongarch/sign-extend-2.c
+++ b/gcc/testsuite/gcc.target/loongarch/sign-extend-2.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O2 -fdump-rtl-expand" } */
/* { dg-final { scan-rtl-dump "subreg/s" "expand" } } */
/* { dg-final { scan-assembler-not "slli.w\t\\\$r\[0-9\]+,\\\$r\[0-9\]+,0" } }
*/
diff --git a/gcc/testsuite/gcc.target/loongarch/sign-extend-bitwise.c
b/gcc/testsuite/gcc.target/loongarch/sign-extend-bitwise.c
index 5753ef69db2..f74a5ed72e6 100644
--- a/gcc/testsuite/gcc.target/loongarch/sign-extend-bitwise.c
+++ b/gcc/testsuite/gcc.target/loongarch/sign-extend-bitwise.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O2" } */
/* { dg-final { scan-assembler-not "slli.w\t\\\$r\[0-9\]+,\\\$r\[0-9\]+,0" } }
*/
diff --git a/gcc/testsuite/gcc.target/loongarch/slt-sign-extend.c
b/gcc/testsuite/gcc.target/loongarch/slt-sign-extend.c
index ea6b28b7c45..a12c463038a 100644
--- a/gcc/testsuite/gcc.target/loongarch/slt-sign-extend.c
+++ b/gcc/testsuite/gcc.target/loongarch/slt-sign-extend.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O2" } */
/* { dg-final { scan-assembler-not "slli.w" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/smuldi3_highpart.c
b/gcc/testsuite/gcc.target/loongarch/smuldi3_highpart.c
index 6f5c686ca38..dcd3767c00c 100644
--- a/gcc/testsuite/gcc.target/loongarch/smuldi3_highpart.c
+++ b/gcc/testsuite/gcc.target/loongarch/smuldi3_highpart.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-mabi=lp64d -O2 -fdump-rtl-expand-all" } */
typedef int TI __attribute ((mode(TI)));
diff --git a/gcc/testsuite/gcc.target/loongarch/sqrtf.c
b/gcc/testsuite/gcc.target/loongarch/sqrtf.c
index c2720faac7b..c8d1f8ec38b 100644
--- a/gcc/testsuite/gcc.target/loongarch/sqrtf.c
+++ b/gcc/testsuite/gcc.target/loongarch/sqrtf.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target hard_float } */
/* { dg-options "-O2 -ffast-math -mrecip -mfrecipe
-fno-unsafe-math-optimizations" } */
/* { dg-final { scan-assembler-times "fsqrt.s" 3 } } */
/* { dg-final { scan-assembler-not "frsqrte.s" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/switch-qi.c
b/gcc/testsuite/gcc.target/loongarch/switch-qi.c
index dd192fd497f..8020ad3bb12 100644
--- a/gcc/testsuite/gcc.target/loongarch/switch-qi.c
+++ b/gcc/testsuite/gcc.target/loongarch/switch-qi.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-march=loongarch64 -mabi=lp64d" } */
/* { dg-final { scan-assembler-not "bstrpick" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/tls-extreme-macro.c
b/gcc/testsuite/gcc.target/loongarch/tls-extreme-macro.c
index 7f6160e1f66..e5f019fe59e 100644
--- a/gcc/testsuite/gcc.target/loongarch/tls-extreme-macro.c
+++ b/gcc/testsuite/gcc.target/loongarch/tls-extreme-macro.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-march=loongarch64 -mabi=lp64d -O2 -mcmodel=extreme
-mtls-dialect=trad -fno-plt -mexplicit-relocs=none -fPIC" } */
/* { dg-final { scan-assembler "test_le:.*la.tls.le\t\\\$r\[0-9\]+,c" { target
tls_native } } } */
/* { dg-final { scan-assembler
"test_ie:.*la.tls.ie\t\\\$r\[0-9\]+,\\\$r\[0-9\]+,d" { target tls_native } } }
*/
diff --git a/gcc/testsuite/gcc.target/loongarch/tls-ie-extreme.c
b/gcc/testsuite/gcc.target/loongarch/tls-ie-extreme.c
index 00c545a3e8c..ce073a583e5 100644
--- a/gcc/testsuite/gcc.target/loongarch/tls-ie-extreme.c
+++ b/gcc/testsuite/gcc.target/loongarch/tls-ie-extreme.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -march=loongarch64 -mabi=lp64d -mcmodel=extreme
-mexplicit-relocs=auto -mrelax" } */
/* { dg-final { scan-assembler-not "R_LARCH_RELAX" { target tls_native } } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/vect-frint-no-inexact.c
b/gcc/testsuite/gcc.target/loongarch/vect-frint-no-inexact.c
index 0b9c673fc4b..6af0bdf64c0 100644
--- a/gcc/testsuite/gcc.target/loongarch/vect-frint-no-inexact.c
+++ b/gcc/testsuite/gcc.target/loongarch/vect-frint-no-inexact.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -mabi=lp64d -mdouble-float -fno-math-errno
-fno-fp-int-builtin-inexact -mlasx -mcmodel=normal" } */
diff --git a/gcc/testsuite/gcc.target/loongarch/vect-frint.c
b/gcc/testsuite/gcc.target/loongarch/vect-frint.c
index 8d829411be5..6fbef736df4 100644
--- a/gcc/testsuite/gcc.target/loongarch/vect-frint.c
+++ b/gcc/testsuite/gcc.target/loongarch/vect-frint.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-O2 -mabi=lp64d -mdouble-float -fno-math-errno
-ffp-int-builtin-inexact -mlasx -mcmodel=normal" } */
diff --git a/gcc/testsuite/gcc.target/loongarch/vect-ftint-no-inexact.c
b/gcc/testsuite/gcc.target/loongarch/vect-ftint-no-inexact.c
index dea90e41705..0b2ec7aee6c 100644
--- a/gcc/testsuite/gcc.target/loongarch/vect-ftint-no-inexact.c
+++ b/gcc/testsuite/gcc.target/loongarch/vect-ftint-no-inexact.c
@@ -1,10 +1,6 @@
-/* { dg-do compile } */
-<<<<<<< HEAD
-/* { dg-options "-O2 -mabi=lp64d -mdouble-float -fno-math-errno
-fno-fp-int-builtin-inexact -mlasx -mcmodel=normal" } */
-=======
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-require-effective-target loongarch_asx } */
-/* { dg-options "-O2 -mabi=lp64d -mdouble-float -fno-math-errno
-fno-fp-int-builtin-inexact -mlasx" } */
->>>>>>> cfaa019e019 (LoongArch: Add loongarch_sx condition to vector testcases)
+/* { dg-options "-O2 -mabi=lp64d -mdouble-float -fno-math-errno
-fno-fp-int-builtin-inexact -mlasx -mcmodel=normal" } */
#include "vect-ftint.c"
diff --git a/gcc/testsuite/gcc.target/loongarch/vect-ftint.c
b/gcc/testsuite/gcc.target/loongarch/vect-ftint.c
index 109db8a14b8..3583d124553 100644
--- a/gcc/testsuite/gcc.target/loongarch/vect-ftint.c
+++ b/gcc/testsuite/gcc.target/loongarch/vect-ftint.c
@@ -1,10 +1,6 @@
-/* { dg-do compile } */
-<<<<<<< HEAD
-/* { dg-options "-O2 -mabi=lp64d -mdouble-float -fno-math-errno
-ffp-int-builtin-inexact -mlasx -mcmodel=normal" } */
-=======
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-require-effective-target loongarch_asx } */
-/* { dg-options "-O2 -mabi=lp64d -mdouble-float -fno-math-errno
-ffp-int-builtin-inexact -mlasx" } */
->>>>>>> cfaa019e019 (LoongArch: Add loongarch_sx condition to vector testcases)
+/* { dg-options "-O2 -mabi=lp64d -mdouble-float -fno-math-errno
-ffp-int-builtin-inexact -mlasx -mcmodel=normal" } */
int out_x[8];
long out_y[4];
diff --git a/gcc/testsuite/gcc.target/loongarch/vect-ld-st-imm12.c
b/gcc/testsuite/gcc.target/loongarch/vect-ld-st-imm12.c
index ed8a71843f3..baac7fc7c8e 100644
--- a/gcc/testsuite/gcc.target/loongarch/vect-ld-st-imm12.c
+++ b/gcc/testsuite/gcc.target/loongarch/vect-ld-st-imm12.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-require-effective-target loongarch_asx } */
/* { dg-options "-march=loongarch64 -mabi=lp64d -mlasx -O2" } */
/* { dg-final { scan-assembler-not "addi.d" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/zero-size-field-pass.c
b/gcc/testsuite/gcc.target/loongarch/zero-size-field-pass.c
index 999dc913a71..257ae8c60ea 100644
--- a/gcc/testsuite/gcc.target/loongarch/zero-size-field-pass.c
+++ b/gcc/testsuite/gcc.target/loongarch/zero-size-field-pass.c
@@ -1,7 +1,7 @@
/* Test that LoongArch backend ignores zero-sized fields of aggregates in
argument passing. */
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -mdouble-float -mabi=lp64d" } */
/* { dg-final { scan-assembler "\\\$f1" } } */
diff --git a/gcc/testsuite/gcc.target/loongarch/zero-size-field-ret.c
b/gcc/testsuite/gcc.target/loongarch/zero-size-field-ret.c
index 40137d97555..61e560b943d 100644
--- a/gcc/testsuite/gcc.target/loongarch/zero-size-field-ret.c
+++ b/gcc/testsuite/gcc.target/loongarch/zero-size-field-ret.c
@@ -1,7 +1,7 @@
/* Test that LoongArch backend ignores zero-sized fields of aggregates in
returning. */
-/* { dg-do compile } */
+/* { dg-do compile { target { loongarch64*-*-* } } } */
/* { dg-options "-O2 -mdouble-float -mabi=lp64d" } */
/* { dg-final { scan-assembler-not "\\\$r4" } } */
diff --git a/gcc/testsuite/lib/target-supports.exp
b/gcc/testsuite/lib/target-supports.exp
index 735f1ae141e..5649611b4d2 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -4354,7 +4354,8 @@ proc add_options_for_bfloat16 { flags } {
proc check_effective_target_scalar_all_fma { } {
if { [istarget aarch64*-*-*]
- || [istarget loongarch*-*-*]} {
+ || ([istarget loongarch*-*-*]
+ && [check_effective_target_hard_float])} {
return 1
}
return 0
@@ -4551,7 +4552,8 @@ proc check_effective_target_vect_cmdline_needed { } {
|| ([istarget arm*-*-*] && [check_effective_target_arm_neon])
|| [istarget aarch64*-*-*]
|| [istarget amdgcn*-*-*]
- || [istarget riscv*-*-*]} {
+ || [istarget riscv*-*-*]
+ || [istarget loongarch*-*-*]} {
return 0
} else {
return 1
@@ -12472,13 +12474,17 @@ proc check_vect_support_and_set_flags { } {
return 0
}
} elseif [istarget loongarch*-*-*] {
- # Set the default vectorization option to "-mlsx" due to the problem
- # of non-aligned memory access when using 256-bit vectorization.
- lappend DEFAULT_VECTCFLAGS "-mdouble-float" "-mlsx"
- if [check_effective_target_loongarch_sx_hw] {
- set dg-do-what-default run
+ if [check_effective_target_loongarch_sx] {
+ # Set the default vectorization option to "-mlsx" due to the problem
+ # of non-aligned memory access when using 256-bit vectorization.
+ lappend DEFAULT_VECTCFLAGS "-mdouble-float" "-mlsx"
+ if [check_effective_target_loongarch_sx_hw] {
+ set dg-do-what-default run
+ } else {
+ set dg-do-what-default compile
+ }
} else {
- set dg-do-what-default compile
+ return 0
}
} else {
return 0
--
2.34.1
