From: Pan Li <pan2...@intel.com>
The widen mul has different source type for differnt platform,
like rv32 or rv64. For rv32, the source of widen mul is 32-bits
while 64-bits in rv64. Thus, leverage HOST_WIDE_INT is not that
correct and result in the pattern match failures in 32-bits system
like rv32.
Thus, leverage the BITS_PER_WORD instead for this pattern.
gcc/ChangeLog:
* match.pd: Leverage BITS_PER_WORD instead of HOST_WIDE_INT
for widen mul precision check.
Signed-off-by: Pan Li <pan2...@intel.com>
---
gcc/match.pd | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/gcc/match.pd b/gcc/match.pd
index 67b33eee5f7..7f31705b652 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -3605,11 +3605,10 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
unsigned widen_prec = TYPE_PRECISION (TREE_TYPE (@3));
unsigned cvt5_prec = TYPE_PRECISION (TREE_TYPE (@5));
unsigned cvt6_prec = TYPE_PRECISION (TREE_TYPE (@6));
- unsigned hw_int_prec = sizeof (HOST_WIDE_INT) * 8;
wide_int c2 = wi::to_wide (@2);
wide_int max = wi::mask (prec, false, widen_prec);
bool c2_is_max_p = wi::eq_p (c2, max);
- bool widen_mult_p = cvt5_prec == cvt6_prec && hw_int_prec == cvt5_prec;
+ bool widen_mult_p = cvt5_prec == cvt6_prec && BITS_PER_WORD == cvt5_prec;
}
(if (widen_prec > prec && c2_is_max_p && widen_mult_p)))))
)
--
2.43.0
