From: Pan Li <pan2...@intel.com>

Similar to the avg_floor, the avg_ceil has the rounding mode
towards +inf, while the vaadd.vv has the rnu which totally match
the sematics.  From RVV spec, the fixed vaadd.vv with rnu,

roundoff_signed(v, d) = (signed(v) >> d) + r
r = v[d - 1]

For vaadd, d = 1, then we have

roundoff_signed(v, 1) = (signed(v) >> 1) + v[0]

If v[0] is bit 0, nothing need to do as there is no rounding.
If v[0] is bit 1, there will be rounding with 2 cases.

Case 1: v is positive.
  roundoff_signed(v, 1) = (signed(v) >> 1) + 1, aka round towards +inf
  roundoff_signed(2 + 3, 1) = (5 >> 1) + 1 = 3

Case 2: v is negative.
  roundoff_signed(v, 1) = (signed(v) >> 1) + 1, aka round towards +inf
  roundoff_signed(-9 + 2, 1) = (-7 >> 1) + 1 = -4 + 1 = -3

Thus, we can leverage the vaadd with rnu directly for avg_ceil.

The below test suites are passed for this patch series.
* The rv64gcv fully regression test.

Pan Li (3):
  RISC-V: Leverage vaadd.vv for signed standard name avg_ceil
  RISC-V: Reconcile the existing test for avg_ceil
  RISC-V: Add test cases for avg_ceil vaadd implementation

 gcc/config/riscv/autovec.md                   |  25 +--
 .../gcc.target/riscv/rvv/autovec/avg.h        |  17 ++
 .../rvv/autovec/avg_ceil-1-i16-from-i32.c     |  12 ++
 .../rvv/autovec/avg_ceil-1-i16-from-i64.c     |  12 ++
 .../rvv/autovec/avg_ceil-1-i32-from-i64.c     |  12 ++
 .../rvv/autovec/avg_ceil-1-i8-from-i16.c      |  12 ++
 .../rvv/autovec/avg_ceil-1-i8-from-i32.c      |  12 ++
 .../rvv/autovec/avg_ceil-1-i8-from-i64.c      |  12 ++
 .../rvv/autovec/avg_ceil-run-1-i16-from-i32.c |  16 ++
 .../rvv/autovec/avg_ceil-run-1-i16-from-i64.c |  16 ++
 .../rvv/autovec/avg_ceil-run-1-i32-from-i64.c |  16 ++
 .../rvv/autovec/avg_ceil-run-1-i8-from-i16.c  |  16 ++
 .../rvv/autovec/avg_ceil-run-1-i8-from-i32.c  |  16 ++
 .../rvv/autovec/avg_ceil-run-1-i8-from-i64.c  |  16 ++
 .../gcc.target/riscv/rvv/autovec/avg_data.h   | 176 ++++++++++++++++++
 .../gcc.target/riscv/rvv/autovec/vls/avg-4.c  |   6 +-
 .../gcc.target/riscv/rvv/autovec/vls/avg-5.c  |   6 +-
 .../gcc.target/riscv/rvv/autovec/vls/avg-6.c  |   6 +-
 .../riscv/rvv/autovec/widen/vec-avg-rv32gcv.c |   2 +-
 .../riscv/rvv/autovec/widen/vec-avg-rv64gcv.c |   2 +-
 20 files changed, 375 insertions(+), 33 deletions(-)
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i16-from-i32.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i16-from-i64.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i32-from-i64.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i16.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i32.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i64.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i16-from-i32.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i16-from-i64.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i32-from-i64.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i8-from-i16.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i8-from-i32.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i8-from-i64.c

-- 
2.43.0

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