> On 7 May 2025, at 12:27, Karl Meakin <karl.mea...@arm.com> wrote:
>
> Add the `+cmpbr` option to enable the FEAT_CMPBR architectural
> extension.
>
> gcc/ChangeLog:
>
> * config/aarch64/aarch64-option-extensions.def (cmpbr): new
> option.
> * config/aarch64/aarch64.h (TARGET_CMPBR): new macro.
> * doc/invoke.texi (cmpbr): new option.
Looks ok to me.
Not a blocker here, but does this need any FMV handling? I guess this is one of
those transparent codegen features and maybe doesn’t need FMV clones…
Thanks,
Kyrill
> ---
> gcc/config/aarch64/aarch64-option-extensions.def | 2 ++
> gcc/config/aarch64/aarch64.h | 3 +++
> gcc/doc/invoke.texi | 3 +++
> 3 files changed, 8 insertions(+)
>
> diff --git a/gcc/config/aarch64/aarch64-option-extensions.def
> b/gcc/config/aarch64/aarch64-option-extensions.def
> index dbbb021f05a..1c3e69799f5 100644
> --- a/gcc/config/aarch64/aarch64-option-extensions.def
> +++ b/gcc/config/aarch64/aarch64-option-extensions.def
> @@ -249,6 +249,8 @@ AARCH64_OPT_EXTENSION("mops", MOPS, (), (), (), "mops")
>
> AARCH64_OPT_EXTENSION("cssc", CSSC, (), (), (), "cssc")
>
> +AARCH64_OPT_EXTENSION("cmpbr", CMPBR, (), (), (), "cmpbr")
> +
> AARCH64_OPT_EXTENSION("lse128", LSE128, (LSE), (), (), "lse128")
>
> AARCH64_OPT_EXTENSION("d128", D128, (LSE128), (), (), "d128")
> diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
> index e8bd8c73c12..d5c4a42e96d 100644
> --- a/gcc/config/aarch64/aarch64.h
> +++ b/gcc/config/aarch64/aarch64.h
> @@ -410,6 +410,9 @@ constexpr auto AARCH64_FL_DEFAULT_ISA_MODE
> ATTRIBUTE_UNUSED
> /* CSSC instructions are enabled through +cssc. */
> #define TARGET_CSSC AARCH64_HAVE_ISA (CSSC)
>
> +/* CB<cc> instructions are enabled through +cmpbr. */
> +#define TARGET_CMPBR AARCH64_HAVE_ISA (CMPBR)
> +
> /* Make sure this is always defined so we don't have to check for ifdefs
> but rather use normal ifs. */
> #ifndef TARGET_FIX_ERR_A53_835769_DEFAULT
> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> index 32bc45725de..3f05e5e0e34 100644
> --- a/gcc/doc/invoke.texi
> +++ b/gcc/doc/invoke.texi
> @@ -22252,6 +22252,9 @@ Enable the FlagM2 flag conversion instructions.
> Enable the Pointer Authentication Extension.
> @item cssc
> Enable the Common Short Sequence Compression instructions.
> +@item cmpbr
> +Enable the shorter compare and branch instructions, @code{cbb}, @code{cbh}
> and
> +@code{cb}.
> @item sme
> Enable the Scalable Matrix Extension. This is only supported when SVE2 is
> also
> enabled.
> --
> 2.45.2
>
