Thanks. Committed.
juzhe.zh...@rivai.ai From: Robin Dapp Date: 2023-11-07 20:10 To: juzhe.zh...@rivai.ai; gcc-patches CC: rdapp.gcc; kito.cheng; Kito.cheng; jeffreyalaw Subject: Re: [PATCH] RISC-V: Add RISC-V into vect_cmdline_needed > It need command line to enable SIMD auto-vectorization (VLS mode in RVV). > It will enable VLS modes auto-vectorization by default if we didn't add RISCV > into vect_cmdline. > So adding it to disable VLS mode vectorization which will fix the FAILs like > other targets. Ah so it's about SIMD despite the name, I see. Still weird but adding riscv then makes sense. So OK. The test probably just very old. Regards Robin
