It need command line to enable SIMD auto-vectorization (VLS mode in RVV). It will enable VLS modes auto-vectorization by default if we didn't add RISCV into vect_cmdline. So adding it to disable VLS mode vectorization which will fix the FAILs like other targets.
juzhe.zh...@rivai.ai From: Robin Dapp Date: 2023-11-07 20:04 To: Juzhe-Zhong; gcc-patches CC: rdapp.gcc; kito.cheng; kito.cheng; jeffreyalaw Subject: Re: [PATCH] RISC-V: Add RISC-V into vect_cmdline_needed Looks OK but I don't really get the test (e.g. gen-vect-26.c). It is only ran if target vect_cmdline_needed, otherwise compiled? Why does that have an impact on the scan? Looks weird but well... Regards Robin
