On Mon, Mar 28, 2022 at 12:14:09PM -0500, Segher Boessenkool wrote:
> On Mon, Mar 28, 2022 at 12:26:02PM -0400, Michael Meissner wrote:
> > However on power9 and power10 it generates:
> >
> > ;; vec_splats (vec_extract (src, 0))
> > mfvsld 3,34
> > mtvsrdd 34,9,9
> >
> > ;; vec_splats (vec_extract (src, 1))
> > mfvsrd 9,34
> > mtvsrdd 34,9,9
> >
> > This is due to the power9 having the mfvsrld instruction which can extract
> > either 64-bit element into a GPR. While there are alternatives for both
> > vector registers and GPR registers, the register allocator prefers to put
> > DImode into GPR registers.
>
> As I said in comment 2 in the PR, it is because we do not have this
> pattern yet, we only have vec_concat. The instruction combiner tries
> to use this pattern, but it doesn't exist :-)
Ok. I will create that function and see if it works.
> > +;; Optimize SPLAT of an extract from a V2DF/V2DI vector with a constant
> > element
> > +;; PR target/99293
> > +(define_insn "*vsx_splat_const_extract_<mode>"
> > + [(set (match_operand:VSX_D 0 "vsx_register_operand" "=wa")
> > + (vec_duplicate:VSX_D
> > + (vec_select:<VS_scalar>
> > + (match_operand:VSX_D 1 "vsx_register_operand" "wa")
> > + (parallel [(match_operand 2 "const_0_to_1_operand" "n")]))))]
> > + "VECTOR_MEM_VSX_P (<MODE>mode)"
> > +{
> > + int which_word = INTVAL (operands[2]);
>
> dword, not word.
Ok.
> > + if (!BYTES_BIG_ENDIAN)
> > + which_word = 1 - which_word;
> > +
> > + operands[3] = GEN_INT (which_word ? 3 : 0);
> > + return "xxpermdi %x0,%x1,%x1,%3";
>
> Please use gen_vsx_xxspltd_v2di, instead. Which itself should not use
> an unspec of course, but that is another patch.
There is also vsx_concat_<mode>_3 which does not use an UNSPEC. Maybe
eventually rewrite vsx_xxspltd_v2di to be a define_insn_and_split.
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/powerpc/pr99293.c
> > @@ -0,0 +1,36 @@
> > +/* { dg-do compile { target powerpc*-*-* } } */
>
> Don't. This is gcc.target/powerpc/ already.
Ok.
> > +/* { dg-final { scan-assembler-times "xxpermdi" 4 } } */
>
> \m \M
Ok.
--
Michael Meissner, IBM
PO Box 98, Ayer, Massachusetts, USA, 01432
email: meiss...@linux.ibm.com
