On Fri, 13 Nov 2020, Joel Hutton wrote:
> Tests are still running, but I believe I've addressed all the comments.
>
> > > +#include <string.h>
> > > +
> >
> > SVE targets will need a:
> >
> > #pragma GCC target "+nosve"
> >
> > here, since we'll generate different code for SVE.
>
> Fixed.
>
> > > +/* { dg-final { scan-assembler-times "shll\t" 1} } */
> > > +/* { dg-final { scan-assembler-times "shll2\t" 1} } */
> >
> > Very minor nit, sorry, but I think:
> >
> > /* { dg-final { scan-assembler-times {\tshll\t} 1 } } */
> >
> > would be better. Using "?\t" works, but IIRC it shows up as a tab
> > character in the testsuite result summary too.
>
> Fixed. Minor nits welcome. :)
>
>
> > OK for the aarch64 bits with the testsuite changes above.
> ok?
The gcc/tree-vect-stmts.c parts are OK.
Richard.
> gcc/ChangeLog:
>
> 2020-11-13 Joel Hutton <joel.hut...@arm.com>
>
> * config/aarch64/aarch64-simd.md: Add vec_widen_lshift_hi/lo<mode>
> patterns.
> * tree-vect-stmts.c
> (vectorizable_conversion): Fix for widen_lshift case.
>
> gcc/testsuite/ChangeLog:
>
> 2020-11-13 Joel Hutton <joel.hut...@arm.com>
>
> * gcc.target/aarch64/vect-widen-lshift.c: New test.
>
--
Richard Biener <rguent...@suse.de>
SUSE Software Solutions Germany GmbH, Maxfeldstrasse 5, 90409 Nuernberg,
Germany; GF: Felix Imend
