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• [gcc r16-4961] Fix gimple_copy for OpenMP atomic load/store [PR122281, PR105001] Tobias Burnus via Gcc-cvs
• [gcc r16-4960] docs: fmv: Update Function multi-versioning documentation [PR c/122202] Alfie Richards via Gcc-cvs
• [gcc r16-4959] RISC-V: Fix the ABI of empty unions and zero length array in struct Kito Cheng via Gcc-cvs
• [gcc r16-4958] AArch64: Fix mv-cmpu-features.C test that fails on older glibc's [PR 122405] Alfie Richards via Gcc-cvs
• [gcc r16-4957] aarch64: Add missing fmv features. Alfie Richards via Gcc-cvs
• [gcc r16-4956] Ada: Add testcase for missed loop vectorization on x86-64/Windows Eric Botcazou via Gcc-cvs
• [gcc r16-4955] xtensa: Revise implementation of hardware FP rounding instructions Max Filippov via Gcc-cvs
• [gcc r16-4950] LoongArch: Improve TARGET_CAN_CHANGE_MODE_CLASS implementation LuluCheng via Gcc-cvs
• [gcc r16-4954] LoongArch: Improve TARGET_MODES_TIEABLE_P implementation LuluCheng via Gcc-cvs
• [gcc r16-4953] LoongArch: Make full use of load insns with unsigned extension LuluCheng via Gcc-cvs
• [gcc r16-4952] LoongArch: Eliminate unnecessary dependencies introduced by xvpermi.q LuluCheng via Gcc-cvs
• [gcc r16-4951] LoongArch: Optimize AND large immediate operation LuluCheng via Gcc-cvs
• [gcc r16-4949] LoongArch: Correct the cost of mulh.{w[u]/d[u]} LuluCheng via Gcc-cvs
• [gcc r16-4948] vect: Fix null dereference in boolean reductions [PR122475] Tamar Christina via Gcc-cvs
• [gcc r16-4947] x86-64: Inline memmove with overlapping unaligned loads and stores H.J. Lu via Gcc-cvs
• [gcc r16-4946] [RISC-V][PR tree-optimization/52345] Optimize testing multiple booleans Jeff Law via Gcc-cvs
• [gcc r16-4945] LoongArch: Add builtin interfaces for 128 and 256 vector conversions. LuluCheng via Gcc-cvs
• [gcc r16-4944] LoongArch: Optimize normal immediate data loading. LuluCheng via Gcc-cvs
• [gcc r16-4943] LoongArch: Fix ICE caused by loongarch_split_reduction [PR122477]. LuluCheng via Gcc-cvs
• [gcc r16-4941] PR modula2/122499: misspelt procedure in import list causes clutter Gaius Mulley via Gcc-cvs
• [gcc r16-4940] SPARC: Make target-specific test more robust Eric Botcazou via Gcc-cvs
• [gcc r16-4939] SPARC: Make target-specific tests more robust Eric Botcazou via Gcc-cvs
• [gcc r16-4938] Ada: Fix ACATS cxaj001 test on Solaris Eric Botcazou via Gcc-cvs
• [gcc r16-4937] [RISC-V] Expose sign extension for 32 bit rotates by constant values on rv64 Jeff Law via Gcc-cvs
• [gcc r16-4936] i386: Canonicalize (compare (minus (a b)) a) to (compare (a b)) [PR122518] Uros Bizjak via Gcc-cvs
• [gcc r16-4935] libstdc++: add missing exports Jason Merrill via Gcc-cvs
• [gcc r16-4934] Ada: Fix crash on tagged private type with unknown discriminants Eric Botcazou via Gcc-cvs
• [gcc r15-10476] AVR: target/122527 -- Don't use __load_N to load from __flash1. Georg-Johann Lay via Gcc-cvs
• [gcc r15-10475] AVR: PR122505 - Fix bloated mulpsi3 in the wake of hacking around PR118012. Georg-Johann Lay via Gcc-cvs
• [gcc r16-4933] Ada: Fix use type clause invalidated by use clause in nested package Eric Botcazou via Gcc-cvs
• [gcc r16-4932] AVR: target/122527 -- Don't use __load_N to load from __flash1. Georg-Johann Lay via Gcc-cvs
• [gcc r16-4931] AVR: Don't run avr/torture/pr84211-fuse-move-1.c with -flto. Georg-Johann Lay via Gcc-cvs
• [gcc r15-10474] c++/modules: Track all static class variables [PR122421] Nathaniel Shead via Gcc-cvs
• [gcc r16-4930] c++/modules: Track all static class variables [PR122421] Nathaniel Shead via Gcc-cvs
• [gcc r16-4929] AVR: PR122505 - Fix bloated mulpsi3 in the wake of hacking around PR118012. Georg-Johann Lay via Gcc-cvs
• [gcc r16-4928] Update SSA iterator documentation Richard Biener via Gcc-cvs
• [gcc r16-4927] gcc: Drop junk vim backup file Sam James via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][SH][PR rtl-optimization/67731] Improve logical IOR of single bit bitfields Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][SH][PR rtl-optimization/67731] Improve logical IOR of single bit bitfields Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Reorder ready queue slightly to avoid unnecessary vsetvl instructions Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Reorder ready queue slightly to avoid unnecessary vsetvl instructions Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR rtl-optimization/122321][RISC-V] Bounds check another access to ira_reg_equiv array Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] niter: Use ranger to query ctz range. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] niter: Use ranger to query ctz range. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: avlprop: Scale AVL by subreg ratio [PR122445]. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: avlprop: Scale AVL by subreg ratio [PR122445]. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Clean up build warnings for VLS calling convention Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Clean up build warnings for VLS calling convention Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Skip riscv/rvv/xtheadvector/pr116593.C if not hostedlib Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Skip riscv/rvv/xtheadvector/pr116593.C if not hostedlib Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Implement standard fixed-length vector calling convention variant Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Implement standard fixed-length vector calling convention variant Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/64345][PR tree-optimization/80770] Improve simple bit extractions on RISC-V Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/64345][PR tree-optimization/80770] Improve simple bit extractions on RISC-V Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Increase NUM_ABI_IDS to support RISC-V VLS calling convention variants Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Increase NUM_ABI_IDS to support RISC-V VLS calling convention variants Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] riscv: Fix gimple folding of the vset* intrinsics [PR122270] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix minor testsuite scan failures for RISC-V Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix minor testsuite scan failures for RISC-V Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: Fix moving data from V_REGS to GR_REGS by scalar move. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: Fix moving data from V_REGS to GR_REGS by scalar move. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for unsigned scalar SAT_MUL form 6 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for unsigned scalar SAT_MUL form 6 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix minor RISC-V testsuite failure Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix minor RISC-V testsuite failure Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix incorrect op of vwaddu/vwsubu wx combine Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix incorrect op of vwaddu/vwsubu wx combine Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/120811] Improving address reloads in LRA Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/120811] Improving address reloads in LRA Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v3] RISC-V: Implement RISC-V profile macro support Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v3] RISC-V: Implement RISC-V profile macro support Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/119587] RISC-V: xtheadmemidx: Split slli.uw pattern Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/119587] RISC-V: xtheadmemidx: Split slli.uw pattern Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve subword atomic patterns in sync.md Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve subword atomic patterns in sync.md Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vwsubu.wv to vwsubu.wx on GR2VR cost Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vwsubu.wv to vwsubu.wx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwsubu.wv combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwsubu.wv combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow VLS types using up to LMUL 8 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow VLS types using up to LMUL 8 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Fix slide pattern recognition [PR122124] Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Fix slide pattern recognition [PR122124] Jeff Law via Gcc-cvs
• [gcc r16-4925] [RISC-V][SH][PR rtl-optimization/67731] Improve logical IOR of single bit bitfields Jeff Law via Gcc-cvs
• [gcc r16-4924] [RISC-V] Reorder ready queue slightly to avoid unnecessary vsetvl instructions Jeff Law via Gcc-cvs
• [gcc r15-10472] Fortran: IS_CONTIGUOUS and pointers to non-contiguous targets [PR114023] Harald Anlauf via Gcc-cvs
• [gcc r15-10471] Fortran: fix TRANSFER of subarray component references [PR122386] Harald Anlauf via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/118945][PATCH v3] RISC-V: Add 'prefer_agnostic' tune parameter for vector policies Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/118945][PATCH v3] RISC-V: Add 'prefer_agnostic' tune parameter for vector policies Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vwaddu.wv to vwaddu.wx on GR2VR cost Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vwaddu.wv to vwaddu.wx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwmulu.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwmulu.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ISC-V: Add test for vec_duplicate + vwaddu.wv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ISC-V: Add test for vec_duplicate + vwaddu.wv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fixup merge conflict Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fixup merge conflict Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Configure Profiles definitions in the definition file. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Configure Profiles definitions in the definition file. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: Fix type of CFA during stack probe [PR122114] Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: Fix type of CFA during stack probe [PR122114] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/122147] Avoid creating (subreg (mem)) in RISC-V port Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/122147] Avoid creating (subreg (mem)) in RISC-V port Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR rtl-optimization/121937] Don't call neg_poly_int_rtx with a vector mode Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR rtl-optimization/121937] Don't call neg_poly_int_rtx with a vector mode Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Adjust ABI specification in recently added Andes tests Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Adjust ABI specification in recently added Andes tests Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/122106] Add missing predicate on crc expanders Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/122106] Add missing predicate on crc expanders Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Clarify if_info.original_cost. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Clarify if_info.original_cost. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add missing define_insn_reservation to tt-ascalon-d8.md [PR121982] Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add missing define_insn_reservation to tt-ascalon-d8.md [PR121982] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/122051] Fix pmode_reg_or_uimm5_operand for thead vector Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/122051] Fix pmode_reg_or_uimm5_operand for thead vector Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH][PR target/121778] RISC-V: Improve rotation detection for RISC-V Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH][PR target/121778] RISC-V: Improve rotation detection for RISC-V Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Optimize clear-lowest-set-bit sequence when ctz is nearby Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Optimize clear-lowest-set-bit sequence when ctz is nearby Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix can_find_related_mode_p for VLS types Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix can_find_related_mode_p for VLS types Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case of unsigned scalar SAT_MUL form 5 for mul Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case of unsigned scalar SAT_MUL form 5 for mul Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Correct lmul estimation Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Correct lmul estimation Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar widening floating-point add Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar widening floating-point add Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121983] Fix unprotected REGNO invocation Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121983] Fix unprotected REGNO invocation Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Improve slide patterns recognition Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Improve slide patterns recognition Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwsubu.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwsubu.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Only Save/Restore required registers for ILP32E/LP64E Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Only Save/Restore required registers for ILP32E/LP64E Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar widening floating-point multiply Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar widening floating-point multiply Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvdot ISA extension. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvdot ISA extension. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwaddu.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwaddu.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case of unsigned scalar SAT_MUL form 5 for widen-mul Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case of unsigned scalar SAT_MUL form 5 for widen-mul Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR tree-optimization/58727] Don't over-simplify constants` Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR tree-optimization/58727] Don't over-simplify constants` Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Adjust recently added test Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Adjust recently added test Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vwaddu.vv to vwaddu.vx on GR2VR cost Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vwaddu.vv to vwaddu.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121213] Avoid unnecessary sign extension in amoswap sequence Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121213] Avoid unnecessary sign extension in amoswap sequence Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow profiles input in '--with-arch' option. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow profiles input in '--with-arch' option. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Imply zicsr for sdtrig and ssstrict extensions. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Imply zicsr for sdtrig and ssstrict extensions. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Widening-Mul: Refine build_and_insert_cast when rhs is cast Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Widening-Mul: Refine build_and_insert_cast when rhs is cast Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix vendor intrinsic tests for disabled multilib configurations Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix vendor intrinsic tests for disabled multilib configurations Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support vnclip idiom testcase [PR120378] Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support vnclip idiom testcase [PR120378] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Match: Support SAT_TRUNC variant NARROW_CLIP Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Match: Support SAT_TRUNC variant NARROW_CLIP Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Suppress cross CC sibcall optimization from vector Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Suppress cross CC sibcall optimization from vector Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add min/max patterns for ifcvt. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add min/max patterns for ifcvt. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix typo in tt-ascalon-d8's pipeline description [PR121878] Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix typo in tt-ascalon-d8's pipeline description [PR121878] Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar dual widening floating-point sub Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar dual widening floating-point sub Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single widening floating-point sub Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single widening floating-point sub Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single widening floating-point add Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single widening floating-point add Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust tt-ascalon-d8 branch cost Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust tt-ascalon-d8 branch cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single-width floating-point sub Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single-width floating-point sub Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single-width floating-point reverse sub Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single-width floating-point reverse sub Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single-width floating-point add Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single-width floating-point add Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add patterns for vector-scalar IEEE floating-point max Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add patterns for vector-scalar IEEE floating-point max Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] gcc: introduce the dep_fusion pass Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] gcc: introduce the dep_fusion pass Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] gcc: introduce the dep_fusion pass Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] gcc: introduce the dep_fusion pass Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Fix ordering of pipeline models Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Fix ordering of pipeline models Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvpackfph ISA extension. Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvpackfph ISA extension. Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsub.vv unsigned combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsub.vv unsigned combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsub.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsub.vv signed combine with GR2VR cost 0, 1 and 15 Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vnmsub.vv to vnmsub.vx on GR2VR cost Jeff Law via Gcc-cvs
  • [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vnmsub.vv to vnmsub.vx on GR2VR cost Jeff Law via Gcc-cvs
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] dep_fusion: Fix if target does not have macro fusion [PR121835] Jeff Law via Gcc-cvs

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