https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122665
--- Comment #3 from Jeevitha <jeevitha at gcc dot gnu.org> --- (In reply to Segher Boessenkool from comment #2) > Yup. But you need to widen the inputs to 64 bits before the multiplication, > that's how RTL works (if you don't, you lose bits). How that works for > vectors I don't know. We always could do an unspec, but it is nicer to > actually describe what happens :-) Sure, I will use unspec.I have one more question: why are we including this pattern in the vsx.md file? Since this instruction uses only Altivec registers, shouldn’t we define it in altivec.md instead? Also, can we use altivec_register_operand instead of vsx_register_operand as predicates?
