https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121199
Bug ID: 121199
Summary: Miscompiled code at O2 for ARMv7 with ldrd instruction
when sche2
Product: gcc
Version: unknown
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c
Assignee: unassigned at gcc dot gnu.org
Reporter: hanwei62 at huawei dot com
Target Milestone: ---
example:
```
#include <stdio.h>
typedef struct {
int a;
int b;
int c;
} MyStruct;
extern int g;
int test(int sel)
{
if (sel > 1) {
return -1;
}
MyStruct arr[2] = {
{g, 19, 19},
{g, 31, 31}
};
printf("Selected: a = %d, b = %d, c = %d\n", arr[sel].a, arr[sel].b,
arr[sel].c);
return 0;
}
```
GCC version: 7.3
command: -O2 -march=armv7-a
the asm like:
```
test:
cmp r0, #1
bgt .L3
str lr, [sp, #-4]!
sub sp, sp, #28
add r1, sp, #24
mov r2, #12
movw r3, #:lower16:g
movt r3, #:upper16:g
mla r2, r2, r0, r1
ldr r3, [r3]
mov ip, #31
mov r1, #19
str ip, [sp, #16]
movw r0, #:lower16:.LC0
str r1, [sp, #4]
movt r0, #:upper16:.LC0
str r3, [sp]
str r3, [sp, #12]
str r1, [sp, #8]
ldr r1, [r2, #-24]
ldrd r2, [r2, #-20] // load uninit data
str ip, [sp, #20] // this store should before ldrd
bl printf
mov r0, #0
add sp, sp, #28
ldr pc, [sp], #4
.L3:
mvn r0, #0
bx lr
.LC0:
.ascii "Selected: a = %d, b = %d, c = %d\012\000"
```
this `ldrd` instruction seems miscompiled.
I see sche2 pass schedule the `ldrd` before `str`
