https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119127
--- Comment #8 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Xi Ruoyao <xry...@gcc.gnu.org>: https://gcc.gnu.org/g:c7d493baf13f1f144f2c4bc375383b6ce5d88a76 commit r15-7923-gc7d493baf13f1f144f2c4bc375383b6ce5d88a76 Author: Xi Ruoyao <xry...@xry111.site> Date: Fri Mar 7 12:49:54 2025 +0800 LoongArch: Fix ICE when trying to recognize bitwise + alsl.w pair [PR119127] When we call loongarch_reassoc_shift_bitwise for <optab>_alsl_reversesi_extend, the mask is in DImode but we are trying to operate it in SImode, causing an ICE. To fix the issue sign-extend the mask into the mode we want. And also specially handle the case the mask is extended into -1 to avoid a miss-optimization. gcc/ChangeLog: PR target/119127 * config/loongarch/loongarch.cc (loongarch_reassoc_shift_bitwise): Sign extend mask to mode, specially handle the case it's extended to -1. * config/loongarch/loongarch.md (loongarch_reassoc_shift_bitwise): Update the comment for the special case.
