https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116896
--- Comment #24 from Jakub Jelinek <jakub at gcc dot gnu.org> --- (In reply to Uroš Bizjak from comment #22) > (In reply to Uroš Bizjak from comment #21) > > (In reply to Jakub Jelinek from comment #19) > > > Created attachment 59273 [details] > > > gcc15-pr116896-inc2.patch > > > > > > I've tried to improve the signed int <=> case (the only one which doesn't > > > use sbb and so needs two xors first), but unfortunately that doesn't seem > > > to > > > work at all, the IL is how I'd like to see it at the end, but then combine > > > happily turns those *setcc_qi_slp back into *setcc_si_1_movzbl and removes > > > the clear instructions. > > > So, I think all we can do is some extra peephole2 to deal with it (though > > > in > > > the jp case it will have to use to movl $0, %reg). > > Huh, another idea is to add a variant of *setcc_qi_slp, perhaps implemented > with unspec or (better?) add some unspec tag to it. If we already emit > optimal code at the expand time, then there is not a lot of work left for > optimization passes anyway. That might be best for the float non-fast-math case, and split it after combine into the strict_low_part.
