https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116896
--- Comment #14 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Jakub Jelinek from comment #13)
> Wonder if it is better to zero extend the setcc results to wider mode before
> the subtraction or do the sub/sbb in QImode and sign extend afterwards.
> My testcases were just doing auto foo (float x, float y) { return x <=> y; }
> auto bar (int x, int y) { return x <=> y; } auto baz (unsigned x, unsigned
> y) { return x <=> y; } and so actually need just 8-bit result and combine is
> able to tweak it in all but one case (signed int).
> seta %al
> movzbl %al, %eax
This sequence is what we would like to avoid. Since spaceship operator returns
SImode, IMO the best way is to emit SImode clearing XORs before the comparison
and emit SUB/SBB in SImode. In case of non-fastmath compare, use mov $0 after
jp to not clobber flags (this is also what Intel optimization guide
recommends).
You will need to emit setcc_qi_slp variant of setcc if you want to preserve
register clearing instrution through optimization passes. Please also note that
mov $0 -> xor conversion should be done automatically by the peephole2 pass
when flags reg can be clobbered.
