[Bug tree-optimization/113281] [14 Regression] Wrong code due to vectorization of shift reduction and missing promotions

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113281

--- Comment #9 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to JuzheZhong from comment #8)
> It should be mismatch on both RISC-V and ARM SVE with -fno-vect-cost-model.

Changed and checked to see that GCC 13 didn't vectorize the loop for aarch64
SVE either so it is a regression.