[Bug tree-optimization/113281] [14] RISC-V rv64gcv_zvl256b vector: Runtime mismatch with rv64gc

[juzhe.zhong at rivai dot ai via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113281

--- Comment #8 from JuzheZhong <juzhe.zhong at rivai dot ai> ---
(In reply to Andrew Pinski from comment #7)
> >  short b = a = 0;
> 
> s/short/int/ allows it to work ...

Thanks Andrew. I think we should change the tittle.

It should be mismatch on both RISC-V and ARM SVE with -fno-vect-cost-model.