[Bug middle-end/112854] [14] RISCV ICE: expand: in store_integral_bit_field, at expmed.cc:1049 on rv32gcv_zvl1024b --param=riscv-autovec-preference=fixed-vlmax

[juzhe.zhong at rivai dot ai via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112854

--- Comment #1 from JuzheZhong <juzhe.zhong at rivai dot ai> ---
I have noticed in full coverage testing.

It's mask bit field related issue again.

Robin could you take a look at it ?

I think you are the better one than me to take care of it.

Thanks.