[Bug target/109092] [13 Regression] ICE: RTL check: expected code 'reg', have 'subreg' in rhs_regno, at rtl.h:1932 when building libgcc on riscv64

[rguenth at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109092

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
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           Priority|P3                          |P1