https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104049
Jakub Jelinek <jakub at gcc dot gnu.org> changed:
What |Removed |Added
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CC| |jakub at gcc dot gnu.org,
| |rsandifo at gcc dot gnu.org
--- Comment #9 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Perhaps the r12-2288-g8695bf78dad1a42636 change wasn't a good idea?
I mean, if we add some hack for the .REDUC_* stuff so that we don't have the
lowpart vec_select that r12-2288 folds into a subreg, won't we still suffer the
same problem when doing anything similar?
E.g. with -O2:
typedef int V __attribute__((vector_size (4 * sizeof (int))));
int
test (V a)
{
int sum = a[0];
return (((unsigned short)sum) + ((unsigned int)sum >> 16)) >> 1;
}
The assembly difference is then:
- fmov w0, s0
- lsr w1, w0, 16
- add w0, w1, w0, uxth
+ umov w0, v0.h[0]
+ fmov w1, s0
+ add w0, w0, w1, lsr 16
lsr w0, w0, 1
ret
Dunno how costly on aarch64 is Neon -> GPR register move.
Is fmov w0, s0; fmov w1, s0 or fmov w0, s0; mov w1, w0 cheaper?
