Hi,

So with the patch attached r300 dri work on PPC :)
The vertex buffer & co still not work (at least do not seems)
Putting anything to 0x2140 do no seems to change anythings
but as my own copy became a mess i will retry this.

Anyway i wanted to ask mesa folks how to make a real
proper patch. The fact is that INREG & OUTREG in
server/radeon_macros.h have to do endian swapping.
Moreover the swapping is only needed for r300, isn't it ?
So do we need to have our own copy of radeon_macros.h
insted of using the one from dri/radeon/ ?

I know that there is MESA_BIG_ENDIAN but isn't a better
way than having macro calling macro ? Xorg redirect INREG
& OUTREG macro to function and choose the right function
for the right platform (with ASM optimisation) could we use
somethings similar in mesa ? (see :
xc/programs/Xserver/hw/xfree86/common/compiler.h)

Anyway Keith could you try too on your PPC with the patch
attached see if you see gears in proper place
(like it does here now :))

best,
Jerome Glisse

diff -Naur o/radeon_macros.h n/radeon_macros.h
--- o/radeon_macros.h   2005-01-14 16:22:06.544119368 +0100
+++ n/radeon_macros.h   2005-01-14 16:18:32.060725800 +0100
@@ -41,6 +41,13 @@
 #define _RADEON_MACROS_H_
 
 
+#define VLL_SWAP16(A)  ((((unsigned short)(A) & 0xff00) >> 8) |                
\
+                        (((unsigned short)(A) & 0x00ff) << 8) )
+#define VLL_SWAP32(A)  ((((unsigned int)(A) & 0xff000000) >> 24) |             
\
+                        (((unsigned int)(A) & 0x00ff0000) >> 8)  |             
\
+                        (((unsigned int)(A) & 0x0000ff00) << 8)  |             
\
+                        (((unsigned int)(A) & 0x000000ff) << 24) )
+
 #  define MMIO_IN8(base, offset) \
        *(volatile unsigned char *)(((unsigned char*)(base)) + (offset))
 #  define MMIO_IN16(base, offset) \
@@ -57,11 +64,11 @@
 
                                /* Memory mapped register access macros */
 #define INREG8(addr)        MMIO_IN8(RADEONMMIO, addr)
-#define INREG16(addr)       MMIO_IN16(RADEONMMIO, addr)
-#define INREG(addr)         MMIO_IN32(RADEONMMIO, addr)
+#define INREG16(addr)       VLL_SWAP16(MMIO_IN16(RADEONMMIO, addr))
+#define INREG(addr)         VLL_SWAP32(MMIO_IN32(RADEONMMIO, addr))
 #define OUTREG8(addr, val)  MMIO_OUT8(RADEONMMIO, addr, val)
-#define OUTREG16(addr, val) MMIO_OUT16(RADEONMMIO, addr, val)
-#define OUTREG(addr, val)   MMIO_OUT32(RADEONMMIO, addr, val)
+#define OUTREG16(addr, val) MMIO_OUT16(RADEONMMIO, addr, VLL_SWAP16(val))
+#define OUTREG(addr, val)   MMIO_OUT32(RADEONMMIO, addr, VLL_SWAP32(val))
 
 #define ADDRREG(addr)       ((volatile GLuint *)(pointer)(RADEONMMIO + (addr)))
 

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