Move MMU fault handler for each generation to adreno function list. This will help to use common code for mmu pagefault handler registration between a6x/a7x and a8x layer.
Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Akhil P Oommen <[email protected]> --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 5 ++++- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 1 + 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 7a87f6407abf..51d32c66512e 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -2619,7 +2619,7 @@ static struct msm_gpu *a6xx_gpu_init(struct drm_device *dev) adreno_gpu->uche_trap_base = 0x1fffffffff000ull; msm_mmu_set_fault_handler(to_msm_vm(gpu->vm)->mmu, gpu, - a6xx_fault_handler); + adreno_gpu->funcs->mmu_fault_handler); ret = a6xx_calc_ubwc_config(adreno_gpu); if (ret) { @@ -2665,6 +2665,7 @@ const struct adreno_gpu_funcs a6xx_gpu_funcs = { .get_timestamp = a6xx_gmu_get_timestamp, .submit_flush = a6xx_flush, .bus_halt = a6xx_bus_clear_pending_transactions, + .mmu_fault_handler = a6xx_fault_handler, }; const struct adreno_gpu_funcs a6xx_gmuwrapper_funcs = { @@ -2697,6 +2698,7 @@ const struct adreno_gpu_funcs a6xx_gmuwrapper_funcs = { .get_timestamp = a6xx_get_timestamp, .submit_flush = a6xx_flush, .bus_halt = a6xx_bus_clear_pending_transactions, + .mmu_fault_handler = a6xx_fault_handler, }; const struct adreno_gpu_funcs a7xx_gpu_funcs = { @@ -2731,4 +2733,5 @@ const struct adreno_gpu_funcs a7xx_gpu_funcs = { .get_timestamp = a6xx_gmu_get_timestamp, .submit_flush = a6xx_flush, .bus_halt = a6xx_bus_clear_pending_transactions, + .mmu_fault_handler = a6xx_fault_handler, }; diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h index acdc51dbec79..50359f2be5d5 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h @@ -79,6 +79,7 @@ struct adreno_gpu_funcs { int (*get_timestamp)(struct msm_gpu *gpu, uint64_t *value); void (*submit_flush)(struct msm_gpu *gpu, struct msm_ringbuffer *ring); void (*bus_halt)(struct adreno_gpu *adreno_gpu, bool gx_off); + int (*mmu_fault_handler)(void *arg, unsigned long iova, int flags, void *data); }; struct adreno_reglist { -- 2.51.0
