On Thu, Oct 30, 2025 at 08:01:10PM +0200, Dmitry Baryshkov wrote: > On Wed, Oct 29, 2025 at 11:19:36AM +0800, yuanjiey wrote: > > On Mon, Oct 27, 2025 at 03:29:40PM +0200, Dmitry Baryshkov wrote: > > > On Mon, Oct 27, 2025 at 02:20:26PM +0100, Konrad Dybcio wrote: > > > > On 10/27/25 2:14 PM, Dmitry Baryshkov wrote: > > > > > On Fri, Oct 24, 2025 at 11:27:53AM +0800, yuanjiey wrote: > > > > >> On Thu, Oct 23, 2025 at 02:02:45PM +0200, Konrad Dybcio wrote: > > > > >>> On 10/23/25 1:48 PM, Dmitry Baryshkov wrote: > > > > >>>> On Thu, Oct 23, 2025 at 03:53:50PM +0800, yuanjie yang wrote: > > > > >>>>> From: Yuanjie Yang <[email protected]> > > > > >>>>> > > > > >>>>> Add DSI PHY support for the Kaanapali platform. > > > > >>>>> > > > > >>>>> Signed-off-by: Yongxing Mou <[email protected]> > > > > >>>>> Signed-off-by: Yuanjie Yang <[email protected]> > > > > >>>>> --- > > > > >>> > > > > >>> [...] > > > > >>> > > > > >>>>> + .io_start = { 0x9ac1000, 0xae97000 }, > > > > >>>> > > > > >>>> These two addresses are very strange. Would you care to explain? > > > > >>>> Other > > > > >>>> than that there is no difference from SM8750 entry. > > > > >>> > > > > >>> They're correct. > > > > >>> Although they correspond to DSI_0 and DSI_2.. > > > > >>> > > > > >>> Yuanjie, none of the DSI patches mention that v2.10.0 is packed with > > > > >>> new features. Please provide some more context and how that impacts > > > > >>> the hw description. > > > > >> > > > > >> Thanks for your reminder. > > > > >> > > > > >> Correct here: > > > > >> io_start = { 0x9ac1000, 0x9ac4000 } DSI_Phy0 DSI_phy1 > > > > >> > > > > >> And v2.10.0 no clearly meaningful changes compared to v2.9.0. > > > > >> just some register address change. > > > > > > > > > > Addition of DSI2 is a meaningful change, which needs to be handled > > > > > both > > > > > in the core and in the DSI / DSI PHY drivers. > > > > > > > > DSI2 was introduced in 8750 already, but it was done without any > > > > fanfare.. > > > > > > > > I see a diagram that shows an XBAR with inputs from DSI0 and DSI2, > > > > and an output to DSI0_PHY (same thing on kaanapali - meaning this > > > > patch is potentially wrong and should ref DSI1_PHY instead?) > > > > > Yes, I check ipcata Doc, I see DSI0\DSI0_PHY DSI1\DSI1_PHY DSI2\DSI2_PHY in > > Kaanapali, > > addition of DSI2\DSI2_PHY compared to SM8650. > > > > look like I should add: config io_start = {DSI0_PHY, DSI1_PHY, DSI2_PHY}, > > I see DSI0, DSI1, DSI2, but DSI0_PHY and DSI1_PHY.
1. From HPG MDSS 13.0.0 chapter 1.6 Architecture I see DSI0 DSI1 DSI2, and only DSI0_PHY DSI1_PHY 2. From ipcatalog memory map address: I can see: DSI0: 0x09AC0000 DSI0_PHY: 0x09AC1000 DSI1: 0x09AC3000 DSI1_PHY: 0x09AC4000 DSI2: 0x09AC6000 DSI2_PHY: 0x09AC7000 Look like there are three DSI_PHY, but only DSI0_PHY DSI1_PHY work. Thanks, Yuanjie > -- > With best wishes > Dmitry
