This large series adds support for the i.MX95 display pipeline, including
DPU, DSI and LVDS support. Most of the components extend existin drivers,
DPU is added into DC driver, DSI into iMX93 DSI driver, LVDS into iMX8MP
LDB. Pixel link and pixel interleaver drivers are reworked to work as two
independent channels, since there seems to be no dependency between their
two channels. The i.MX95 DTSI changes are also included.
Since the DPU chapter is missing from the i.MX95 RM, this is based on the
NXP downstream kernel fork code and there might be issues.
Majority of this series are DPU patches on top of the DC driver, I tried
to keep them separate and easy to review. Later part adds LVDS and DSI
support, this can be split into separate series.
Both DSI-to-HDMI path using LT8912 bridge and LVDS single-lane with Logic
Techno LT170410-2WHC panel were tested on Toradex i.MX95 Verdin EVK v1.2 .
Liu Ying (2):
drm/bridge: imx: Add NXP i.MX95 pixel interleaver support
drm/bridge: imx: Add NXP i.MX95 pixel link support
Marek Vasut (36):
dt-bindings: display: imx: Document i.MX95 Display Controller
DomainBlend
drm/imx: Add i.MX95 Display Controller DomainBlend
dt-bindings: display: imx: Document i.MX95 Display Controller
processing units
drm/imx: dc: Use bulk clock
drm/imx: dc: Rework dc_subdev_get_id() to drop ARRAY_SIZE() use
drm/imx: dc: Rename i.MX8QXP specific Link IDs
drm/imx: dc: cf: Pass struct dc_subdev_info via OF match data
drm/imx: dc: de: Pass struct dc_de_subdev_match_data via OF match data
drm/imx: dc: ed: Rework dc_ed_pec_src_sel() to drop ARRAY_SIZE() use
drm/imx: dc: ed: Pass struct dc_ed_subdev_match_data via OF match data
drm/imx: dc: fg: Parametrize register access
drm/imx: dc: ed: Pass struct dc_fg_subdev_match_data via OF match data
drm/imx: dc: fu: Describe remaining register offsets
drm/imx: dc: fu: Inline FRAC_OFFSET into FetchLayer and FetchWrap
drm/imx: dc: fu: Pass struct dc_fu_subdev_match_data via OF match data
drm/imx: dc: lb: Pass struct dc_lb_subdev_match_data via OF match data
drm/imx: dc: tc: Pass struct dc_tc_subdev_match_data via OF match data
drm/imx: dc: ic: Pass struct dc_ic_subdev_match_data via OF match data
drm/imx: dc: ic: Use DT node as interrupt controller name
drm/imx: dc: Configure display CSR clock feed select
drm/imx: dc: crtc: Do not check disabled CRTCs
drm/imx: dc: Keep FU unit running on i.MX95
drm/imx: dc: Add OF match data for i.MX95
drm/imx: Add more RGB swizzling options
dt-bindings: display: bridge: Document NXP i.MX95 pixel interleaver
support
dt-bindings: display: bridge: Document NXP i.MX95 pixel link support
dt-bindings: display: bridge: Document Freescale i.MX95 MIPI DSI
drm/bridge: imx93-mipi-dsi: Add i.MX95 PLL initialization
dt-bindings: clock: Split support for i.MX95 LVDS CSR
dt-bindings: display: bridge: Document i.MX95 LVDS display bridge
binding
dt-bindings: display: bridge: ldb: Add an i.MX95 entry
drm/bridge: fsl-ldb: Parse register offsets from DT
drm/bridge: fsl-ldb: Add i.MX95 support
dt-bindings: interrupt-controller: fsl,irqsteer: Add i.MX95 support
dt-bindings: clock: support i.MX95 Display Stream CSR module
arm64: dts: imx95: Describe display pipeline
Sandor Yu (1):
drm: bridge: imx: Add i.MX95 LVDS Display Bridge (LDB) driver
.../bindings/clock/nxp,imx95-blk-ctl.yaml | 1 -
.../clock/nxp,imx95-lvds-blk-ctl.yaml | 80 ++
.../display/bridge/fsl,imx93-mipi-dsi.yaml | 48 +-
.../display/bridge/fsl,imx95-lvds.yaml | 140 ++++
.../bridge/fsl,imx95-pixel-interleaver.yaml | 85 +++
.../display/bridge/fsl,imx95-pixel-link.yaml | 101 +++
.../bindings/display/bridge/fsl,ldb.yaml | 2 +
.../imx/fsl,imx8qxp-dc-constframe.yaml | 4 +-
.../imx/fsl,imx8qxp-dc-display-engine.yaml | 45 +-
.../display/imx/fsl,imx8qxp-dc-extdst.yaml | 4 +-
.../display/imx/fsl,imx8qxp-dc-fetchunit.yaml | 1 +
.../display/imx/fsl,imx8qxp-dc-framegen.yaml | 13 +-
.../imx/fsl,imx8qxp-dc-layerblend.yaml | 4 +-
.../imx/fsl,imx8qxp-dc-pixel-engine.yaml | 52 +-
.../display/imx/fsl,imx8qxp-dc-tcon.yaml | 5 +-
.../bindings/display/imx/fsl,imx8qxp-dc.yaml | 53 +-
.../display/imx/fsl,imx95-dc-domainblend.yaml | 32 +
.../imx/nxp,imx95-display-stream-csr.yaml | 41 +
.../interrupt-controller/fsl,irqsteer.yaml | 2 +
arch/arm64/boot/dts/freescale/imx95.dtsi | 710 ++++++++++++++++++
drivers/gpu/drm/bridge/fsl-ldb.c | 65 +-
drivers/gpu/drm/bridge/imx/Kconfig | 28 +
drivers/gpu/drm/bridge/imx/Makefile | 3 +
drivers/gpu/drm/bridge/imx/imx-ldb-helper.h | 2 +
drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c | 612 ++++++++++++++-
drivers/gpu/drm/bridge/imx/imx95-ldb.c | 470 ++++++++++++
.../drm/bridge/imx/imx95-pixel-interleaver.c | 217 ++++++
drivers/gpu/drm/bridge/imx/imx95-pixel-link.c | 184 +++++
drivers/gpu/drm/imx/dc/Kconfig | 4 +-
drivers/gpu/drm/imx/dc/Makefile | 2 +-
drivers/gpu/drm/imx/dc/dc-cf.c | 41 +-
drivers/gpu/drm/imx/dc/dc-crtc.c | 6 +
drivers/gpu/drm/imx/dc/dc-db.c | 227 ++++++
drivers/gpu/drm/imx/dc/dc-de.c | 83 +-
drivers/gpu/drm/imx/dc/dc-de.h | 14 +
drivers/gpu/drm/imx/dc/dc-drv.c | 45 +-
drivers/gpu/drm/imx/dc/dc-drv.h | 11 +-
drivers/gpu/drm/imx/dc/dc-ed.c | 67 +-
drivers/gpu/drm/imx/dc/dc-fg.c | 157 ++--
drivers/gpu/drm/imx/dc/dc-fl.c | 145 +++-
drivers/gpu/drm/imx/dc/dc-fu.c | 46 +-
drivers/gpu/drm/imx/dc/dc-fu.h | 7 +-
drivers/gpu/drm/imx/dc/dc-fw.c | 54 +-
drivers/gpu/drm/imx/dc/dc-ic.c | 192 +++--
drivers/gpu/drm/imx/dc/dc-kms.h | 6 +
drivers/gpu/drm/imx/dc/dc-lb.c | 109 ++-
drivers/gpu/drm/imx/dc/dc-pe.c | 12 +-
drivers/gpu/drm/imx/dc/dc-pe.h | 41 +-
drivers/gpu/drm/imx/dc/dc-plane.c | 18 +-
drivers/gpu/drm/imx/dc/dc-tc.c | 55 +-
50 files changed, 4000 insertions(+), 346 deletions(-)
create mode 100644
Documentation/devicetree/bindings/clock/nxp,imx95-lvds-blk-ctl.yaml
create mode 100644
Documentation/devicetree/bindings/display/bridge/fsl,imx95-lvds.yaml
create mode 100644
Documentation/devicetree/bindings/display/bridge/fsl,imx95-pixel-interleaver.yaml
create mode 100644
Documentation/devicetree/bindings/display/bridge/fsl,imx95-pixel-link.yaml
create mode 100644
Documentation/devicetree/bindings/display/imx/fsl,imx95-dc-domainblend.yaml
create mode 100644
Documentation/devicetree/bindings/display/imx/nxp,imx95-display-stream-csr.yaml
create mode 100644 drivers/gpu/drm/bridge/imx/imx95-ldb.c
create mode 100644 drivers/gpu/drm/bridge/imx/imx95-pixel-interleaver.c
create mode 100644 drivers/gpu/drm/bridge/imx/imx95-pixel-link.c
create mode 100644 drivers/gpu/drm/imx/dc/dc-db.c
---
Cc: Abel Vesa <[email protected]>
Cc: Conor Dooley <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Krzysztof Kozlowski <[email protected]>
Cc: Laurent Pinchart <[email protected]>
Cc: Liu Ying <[email protected]>
Cc: Lucas Stach <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Pengutronix Kernel Team <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Shawn Guo <[email protected]>
Cc: Thomas Zimmermann <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
--
2.51.0
