On 10/14/25 10:51 AM, Liu Ying wrote:
Hi Marek,
Hi,
On 10/11/2025, Marek Vasut wrote:
This large series adds support for the i.MX95 display pipeline, including
DPU, DSI and LVDS support. Most of the components extend existin drivers,
DPU is added into DC driver, DSI into iMX93 DSI driver, LVDS into iMX8MP
LDB. Pixel link and pixel interleaver drivers are reworked to work as two
independent channels, since there seems to be no dependency between their
two channels. The i.MX95 DTSI changes are also included.
Since the DPU chapter is missing from the i.MX95 RM, this is based on the
NXP downstream kernel fork code and there might be issues.
Majority of this series are DPU patches on top of the DC driver, I tried
to keep them separate and easy to review. Later part adds LVDS and DSI
support, this can be split into separate series.
Like you said that this patch series is large, please split it.
Also, make sure proper maintainers are in TO or CC lists for each patch(b4
tool should do that automatically for you), e.g., patch 37 should be sent
to Thomas Gleixner <[email protected]> according to MAINTAINERS.
I had to trim down the CC list for this series, it was enormous.
I wanted to put this whole thing on the list first, before I start
splitting it up.
For starters, I think I can send these separately:
- drm/imx: dc: Use bulk clock
- drm/imx: dc: Rework dc_subdev_get_id() to drop ARRAY_SIZE() use
- drm/imx: dc: Rename i.MX8QXP specific Link IDs
- drm/imx: Add more RGB swizzling options
- dt-bindings: interrupt-controller: fsl,irqsteer: Add i.MX95 support
Then in second round, probably all these clean ups:
- drm/imx: dc: *: Pass struct dc_*_subdev_match_data via OF match data
And then rest afterward.
What do you think ?
--
Best regards,
Marek Vasut