On 04/03/2021 23:15, Kinsey Moore wrote:
Real hardware running AArch64 does not appreciate accesses misaligned
relative to the data size. This prevents generation of misaligned writes
which would throw exceptions.
The patch set is fine independent of the following comment.
To me this problem with misaligned access looks like an MMU/system
configuration issue. For example in AArch32, you have to enable
misaligned access in SCTL[A].
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