Real hardware running AArch64 does not appreciate accesses misaligned relative to the data size. This prevents generation of misaligned writes which would throw exceptions. --- spec/build/bsps/aarch64/xilinx-zynqmp/abi.yml | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/abi.yml b/spec/build/bsps/aarch64/xilinx-zynqmp/abi.yml index c723b5f252..14b4ad56a0 100644 --- a/spec/build/bsps/aarch64/xilinx-zynqmp/abi.yml +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/abi.yml @@ -8,10 +8,12 @@ copyrights: - Copyright (C) 2020 On-Line Applications Research (OAR) default: - -mcpu=cortex-a53 +- -mstrict-align default-by-variant: - value: - -mcpu=cortex-a53 - -mabi=ilp32 + - -mstrict-align variants: - aarch64/xilinx_zynqmp_ilp32_qemu description: | -- 2.20.1 _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
