On 26/06/2016 1:04 AM, Pavel Pisa wrote: > Probability of some BSP breakages is high. > But without cache operations most of operations targeting > peripherals using DMA are broken as well as runt time dynamic > loader cannot be corrected to work on architectures using cache. > > I think that highly desired enhancement correction worth the troubles > and temporal BSP breakages.
I agree. It is better we expose any issues as soon as we can and encourage everyone to test and fix them. Thank you for all your efforts. Chris _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
