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commit 690f3e2a55b90de366869c1199954e2ae2c555e3 Author: Jerzy Kasenberg <[email protected]> AuthorDate: Wed May 6 08:20:17 2026 +0200 stm32_hal: Update hal_flash to work with stm32h5 Writes to STM32H5 flash require to have DCACHE disabled due to some AHB access problems. Additionally after last write code wait for program operation to finish. Otherwise even though data is written to flash for some time reads from this area can show old data Signed-off-by: Jerzy Kasenberg <[email protected]> --- hw/mcu/stm/stm32_common/src/hal_flash.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/hw/mcu/stm/stm32_common/src/hal_flash.c b/hw/mcu/stm/stm32_common/src/hal_flash.c index 7acf028f2..da3191796 100644 --- a/hw/mcu/stm/stm32_common/src/hal_flash.c +++ b/hw/mcu/stm/stm32_common/src/hal_flash.c @@ -91,10 +91,12 @@ stm32_flash_write_linear(const struct hal_flash *dev, uint32_t address, { uint64_t val[VAL_SIZE]; uint32_t i; - int rc; + int rc = 0; uint8_t align; uint32_t num_words; - +#if defined(STM32H5) + bool icache_enabled = LL_ICACHE_IsEnabled(); +#endif align = dev->hf_align; #if MYNEWT_VAL(MCU_FLASH_MIN_WRITE_SIZE) == 1 @@ -134,7 +136,7 @@ stm32_flash_write_linear(const struct hal_flash *dev, uint32_t address, rc = HAL_FLASH_Program(FLASH_PROGRAM_TYPE, address, val[0]); #endif if (rc != HAL_OK) { - return rc; + break; } address += align; @@ -151,7 +153,13 @@ stm32_flash_write_linear(const struct hal_flash *dev, uint32_t address, } } - return 0; +#ifdef STM32H5 + if (icache_enabled) { + LL_ICACHE_Invalidate(); + } +#endif + + return rc; } #endif
