[clang] [llvm] [AArch64] Add support for Cortex-A520, Cortex-A720 and Cortex-X4 CPUs (PR #72395)

[Lucas Duarte Prates via cfe-commits]

================
@@ -1325,6 +1352,10 @@ def ProcessorFeatures {
                                  FeatureMatMulInt8, FeatureBF16, FeatureAM,
                                  FeatureMTE, FeatureETE, FeatureSVE2BitPerm,
                                  FeatureFP16FML];
+  list<SubtargetFeature> A520 = [HasV9_2aOps, FeatureNEON, FeaturePerfMon,
----------------
pratlucas wrote:

`FeatureNeon`, `FeatureMatMulInt8`, `FeatureBF16` and `FeatureFineGrainedTraps` 
are already enabled by default on Armv9.2-A. Can they be removed from this list 
to avoid the redundancy?

https://github.com/llvm/llvm-project/pull/72395
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits