[llvm] [clang] [AArch64] Add support for Cortex-A520, Cortex-A720 and Cortex-X4 CPUs (PR #72395)

[Lucas Duarte Prates via cfe-commits]

================
@@ -1372,6 +1408,11 @@ def ProcessorFeatures {
                                  FeatureSPE, FeatureBF16, FeatureMatMulInt8,
                                  FeatureMTE, FeatureSVE2BitPerm, 
FeatureFullFP16,
                                  FeatureFP16FML];
+  list<SubtargetFeature> X4 =   [HasV9_2aOps, FeatureSVE, FeatureNEON,
----------------
pratlucas wrote:

`FeatureSVE`, `FeatureFullFP16`, `FeatureNeon`, `FeatureBF16` and 
`FeatureMatMulInt8` are already enabled by default on Armv9.2-A. Can they be 
removed from this list to avoid the redundancy?

https://github.com/llvm/llvm-project/pull/72395
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