mcgrathr added a comment. I don't see changes here to make the Fuchsia & Android targets stop doing implicit `-ffixed-x18` and to make them start doing implicit `-msmall-data-limit=0` for non-PIC modes.
================ Comment at: clang/lib/Driver/SanitizerArgs.cpp:546 - if ((Kinds & SanitizerKind::ShadowCallStack) && - ((TC.getTriple().isAArch64() && - !llvm::AArch64::isX18ReservedByDefault(TC.getTriple())) || - (TC.getTriple().isRISCV() && - !llvm::RISCV::isX18ReservedByDefault(TC.getTriple()))) && + if ((Kinds & SanitizerKind::ShadowCallStack) && TC.getTriple().isAArch64() && + !llvm::AArch64::isX18ReservedByDefault(TC.getTriple()) && ---------------- For RISC-V this needs a similar check that the equivalent of `-msmall-data-limit=0` is in force (that's the default under `-fPIC` but not other modes). ================ Comment at: llvm/test/CodeGen/RISCV/reserved-regs.ll:60 -; RUN: llc -mtriple=riscv64-fuchsia -verify-machineinstrs < %s | FileCheck %s -check-prefix=X18 -; RUN: llc -mtriple=riscv64-linux-android -verify-machineinstrs < %s | FileCheck %s -check-prefix=X18 +;; Check that targets that reserve a register by default reserve the correct registers +;; Android and Fuchsia reserve the ShadowCallStack register (gp/x3) by default. ---------------- gp is a fixed register for all RISC-V targets. What's important to check is that Fuchsia and Android disable the small-data-section behavior. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D146463/new/ https://reviews.llvm.org/D146463 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
