https://sourceware.org/bugzilla/show_bug.cgi?id=25445
--- Comment #4 from H.J. Lu <hjl.tools at gmail dot com> --- (In reply to Jan Beulich from comment #3) > (In reply to H.J. Lu from comment #0) > > 0: 66 63 08 movslq (%rax),%cx > > Looks correct to me. movslq is AT&T syntax for 32 bits -> 64 bits. It isn't accepted by assembler. movsxd should be here. > > (In reply to H.J. Lu from comment #1) > > Also > > > > 63 08 movslq (%rax),%ecx > > This too looks correct to me. movsxd should be here. > The only anomaly I can think of because of the vendor difference would be a > memory operand in Intel syntax mode, which - if tagged by an operand size - > might want to be WORD PTR for the 16-bit case in Intel64 mode and DWORD PTR > in the AMD64 one. Manual can be wrong. The current Intel manual says that MOVSXD is valid for 32-bit. Can you double check MOVSXD on AMD processor to verify movsxd (%rax), %cx does load 4 bytes? -- You are receiving this mail because: You are on the CC list for the bug.
