Mark Hahn wrote:
>> Has anyone any experience of this? How do these products stack >> up against the traditional Beowulf solution? > > they _are_ in the spirit of Beowulf, which is all about hacking > commodity hardware to suit HPC purposes. ... but it would be hard to fit into a 1U case, and the 200+ watt power requirements could be daunting to smaller supplies. Not that I am against GPUs as accelerators, on the contrary. Just be aware that GPUs with significant calculation capability also will require a rather significant power supply and cooling airflow. Right now, accelerated computing is in its infancy. You have host based (SSE*), and host attached GPUs, FPGAs, APUs (Accelerator Processor Units) in general such as ClearSpeed et al. You can think of clusters as accelerators in the sense that they provide a larger number of cycles per unit time to your application. There are no single APIs to bind them all though. A number of the APU people are realizing that there is significant benefit to providing acceleration behind existing popular interfaces, as it lowers the barrier to adoption and usage. If your code is designed with FFTW in mind and you have to re-organize your arrays to suit another FFT implementation, this can be both annoying for the programmer, and inefficient. Regardless of the accelerator you choose, expect *some* rewriting of code at minimum. Current GPUs are focused upon singles and ints. As Jeff noted, doubles should be coming. As Mark noted, slow doubles aren't useful. -- Joseph Landman, Ph.D Founder and CEO Scalable Informatics LLC, email: [EMAIL PROTECTED] web : http://www.scalableinformatics.com phone: +1 734 786 8423 fax : +1 734 786 8452 or +1 866 888 3112 cell : +1 734 612 4615 _______________________________________________ Beowulf mailing list, Beowulf@beowulf.org To change your subscription (digest mode or unsubscribe) visit http://www.beowulf.org/mailman/listinfo/beowulf