On 21.03.2023 16:58, Roger Pau Monné wrote: > On Tue, Mar 21, 2023 at 04:51:43PM +0100, Jan Beulich wrote: >> On 21.03.2023 15:42, Roger Pau Monné wrote: >>> On Tue, May 26, 2020 at 08:49:52AM +0200, Jan Beulich wrote: >>>> Respective Core Gen10 processor lines are affected, too. >>>> >>>> Signed-off-by: Jan Beulich <[email protected]> >>>> >>>> --- a/xen/arch/x86/mm.c >>>> +++ b/xen/arch/x86/mm.c >>>> @@ -6045,6 +6045,8 @@ const struct platform_bad_page *__init g >>>> case 0x000506e0: /* errata SKL167 / SKW159 */ >>>> case 0x000806e0: /* erratum KBL??? */ >>>> case 0x000906e0: /* errata KBL??? / KBW114 / CFW103 */ >>>> + case 0x000a0650: /* erratum Core Gen10 U/H/S 101 */ >>>> + case 0x000a0660: /* erratum Core Gen10 U/H/S 101 */ >>> >>> I think this is errata CML101, I would add that at the end of the >>> comment. >> >> Indeed in the current version of the document CML prefix exist. The older >> document I've been looking at has no such letter acronyms in front of the >> errata numbers. I can certainly update. >> >>> Also you seem to be missing the '806ec' model (806e0 case)? (listed as >>> 'U 4+2 V1') >> >> Isn't that pre-existing (see 2nd line of context above)? > > Oh, indeed. Would you mind also adding a reference to CML101 for > 0x000806e0 then?
Already done. Provided there'll be a v2 in the first place, considering Andrew's comments (which I still need to properly consume). Jan
