On 6/22/21 9:48 AM, Joerg Roedel wrote:
> From: Brijesh Singh <[email protected]>
> 
> Add the necessary defines for supporting the GHCB version 2 protocol.
> This includes defines for:
> 
>       - MSR-based AP hlt request/response
>       - Hypervisor Feature request/response
> 
> This is the bare minimum of requests that need to be supported by a GHCB
> version 2 implementation. There are more requests in the specification,
> but those depend on Secure Nested Paging support being available.
> 
> These defines are shared between SEV host and guest support, so they are
> submitted as an individual patch without users yet to avoid merge
> conflicts in the future.
> 
> Signed-off-by: Brijesh Singh <[email protected]>
> Co-developed-by: Tom Lendacky <[email protected]>
> Signed-off-by: Tom Lendacky <[email protected]>
> Signed-off-by: Joerg Roedel <[email protected]>
> ---
>  arch/x86/include/asm/sev-common.h | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/arch/x86/include/asm/sev-common.h 
> b/arch/x86/include/asm/sev-common.h
> index 1cc9e7dd8107..4e6c4c7cb294 100644
> --- a/arch/x86/include/asm/sev-common.h
> +++ b/arch/x86/include/asm/sev-common.h
> @@ -47,6 +47,21 @@
>               (((unsigned long)reg & GHCB_MSR_CPUID_REG_MASK) << 
> GHCB_MSR_CPUID_REG_POS) | \
>               (((unsigned long)fn) << GHCB_MSR_CPUID_FUNC_POS))
>  
> +/* AP Reset Hold */
> +#define GHCB_MSR_AP_RESET_HOLD_REQ           0x006
> +#define GHCB_MSR_AP_RESET_HOLD_RESP          0x007
> +#define GHCB_MSR_AP_RESET_HOLD_RESULT_POS    12
> +#define GHCB_MSR_AP_RESET_HOLD_RESULT_MASK   GENMASK_ULL(51, 0)
> +
> +/* GHCB Hypervisor Feature Request/Response */
> +#define GHCB_MSR_HV_FT_REQ                   0x080
> +#define GHCB_MSR_HV_FT_RESP                  0x081
> +#define GHCB_MSR_HV_FT_POS                   12
> +#define GHCB_MSR_HV_FT_MASK                  GENMASK_ULL(51, 0)
> +
> +#define GHCB_MSR_HV_FT_RESP_VAL(v)           \
> +     (((unsigned long)((v) & GHCB_MSR_HV_FT_MASK) >> GHCB_MSR_HV_FT_POS))

This should shift down first and then mask or else the mask should be from
12 to 63.

Thanks,
Tom

> +
>  #define GHCB_MSR_TERM_REQ            0x100
>  #define GHCB_MSR_TERM_REASON_SET_POS 12
>  #define GHCB_MSR_TERM_REASON_SET_MASK        0xf
> 
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