On Tue, 1 Jun 2021 at 13:37, Schweikhardt, Jens (TSPCE3-TL4) <jens.schweikha...@tesat.de> wrote: > > Hesham Almatary wrote: > > > You might be confusing taking BASE[XLEN-1:2] (see Figure 3.8) with shifting > > an address by 2. RTEMS aligns _RISCV_Exception_handler to 4 bytes as per > > the specification, so you'd always end up with an address with zeros in the > > least significant 2 bits. So, BASE[1:0] will always be zero. When you write > > that to mtvec, you'll effectively set the MODE to 0 (Direct), and > > BASE[XLEN-1:2] will be placed as is in mtvec. > > > I hope that clarifies things up a bit. > > Yes it does, thanks a lot. So in the end it was a notation misinterpretation. > FIELD[x:y] means the slice of FIELD bits ranging from bit x to bit y, NOT > that FIELD is x-y bits wide. > Yes, exactly.
> Jens > > ________________________________ > > Tesat-Spacecom GmbH & Co. KG > Sitz: Backnang; Registergericht: Amtsgericht Stuttgart HRA 270977 > Persoenlich haftender Gesellschafter: Tesat-Spacecom Geschaeftsfuehrungs GmbH; > Sitz: Backnang; Registergericht: Amtsgericht Stuttgart HRB 271658; > Geschaeftsfuehrung: Dr. Marc Steckling, Kerstin Basche, Ralf Zimmermann > > [banner] -- Hesham _______________________________________________ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
