Hi Leo, Hal, Tom, and Heinrich, et.al On 2/9/26 03:21, Leo Liang wrote: > On Fri, Oct 24, 2025 at 04:59:23PM +0800, Hal Feng wrote: >> VisionFive 2 Lite is a mini SBC based on the StarFive JH7110S industrial >> SoC which can run at -40~85 degrees centigrade and up to 1.25GHz. >> >> Board features: >> - JH7110S SoC >> - 4/8 GiB LPDDR4 DRAM >> - AXP15060 PMIC >> - 40 pin GPIO header >> - 1x USB 3.0 host port >> - 3x USB 2.0 host port >> - 1x M.2 M-Key (size: 2242) >> - 1x MicroSD slot (optional non-removable 64GiB eMMC) >> - 1x QSPI Flash >> - 1x I2C EEPROM >> - 1x 1Gbps Ethernet port >> - SDIO-based Wi-Fi & UART-based Bluetooth >> - 1x HDMI port >> - 1x 2-lane DSI >> - 1x 2-lane CSI >> >> VisionFive 2 Lite schematics: >> https://doc-en.rvspace.org/VisionFive2Lite/PDF/VF2_LITE_V1.10_TF_20250818_SCH.pdf >> VisionFive 2 Lite Quick Start Guide: >> https://doc-en.rvspace.org/VisionFive2Lite/VisionFive2LiteQSG/index.html >> More documents: https://doc-en.rvspace.org/Doc_Center/visionfive_2_lite.html >> >> Note: Patch 1 and 2 are the kernel device tree picked from [1]. They are >> just for test and please ignore them because dts/upstream should be synced >> with devicetree-rebasing. >> >> [1] >> https://lore.kernel.org/all/[email protected]/ >> >> Changes since RFC: >> - Rebase on the latest mainline. >> - Improve the commit messages. >> - Drop patch 7. >> patch 3, 4: >> - Return 0 instead of 0xFF if read_eeprom() fails. >> patch 5: >> - Keep default FORMAT_VERSION 0x2. >> - Change wifi_bt field to onboard_module field and use bit 0 to mark >> WIFI/BT. >> - Drop all "no_eth0", "no_eth1" configuration. >> >> History: >> RFC: >> https://lore.kernel.org/all/[email protected]/ >> >> Hal Feng (9): >> riscv: dts: starfive: jh7110-common: Move out some nodes to the board >> dts >> riscv: dts: starfive: Add VisionFive 2 Lite board device tree >> eeprom: starfive: Simplify get_ddr_size_from_eeprom() >> eeprom: starfive: Correct get_pcb_revision_from_eeprom() >> eeprom: starfive: Support eeprom data format v3 >> pcie: starfive: Add a optional power gpio support >> configs: visionfive2: Add VisionFive 2 Lite DT to OF_LIST >> board: starfive: spl: Support VisionFive 2 Lite >> board: starfive: visionfive2: Add VisionFive 2 Lite fdt selection >> >> arch/riscv/cpu/jh7110/spl.c | 2 +- >> arch/riscv/include/asm/arch-jh7110/eeprom.h | 13 +- >> board/starfive/visionfive2/spl.c | 3 + >> .../visionfive2/starfive_visionfive2.c | 2 + >> .../visionfive2/visionfive2-i2c-eeprom.c | 64 ++++--- >> configs/starfive_visionfive2_defconfig | 2 +- >> drivers/pci/pcie_starfive_jh7110.c | 8 + >> .../src/riscv/starfive/jh7110-common.dtsi | 22 --- >> .../jh7110-deepcomputing-fml13v01.dts | 49 ++++++ >> .../src/riscv/starfive/jh7110-milkv-mars.dts | 49 ++++++ >> .../riscv/starfive/jh7110-pine64-star64.dts | 49 ++++++ >> .../jh7110-starfive-visionfive-2.dtsi | 46 +++++ >> dts/upstream/src/riscv/starfive/jh7110.dtsi | 16 -- >> .../jh7110s-starfive-visionfive-2-lite.dts | 159 ++++++++++++++++++ >> 14 files changed, 418 insertions(+), 66 deletions(-) >> create mode 100644 >> dts/upstream/src/riscv/starfive/jh7110s-starfive-visionfive-2-lite.dts > > Reviewed-by: Leo Yu-Chi Liang <[email protected]>
The series has errors as it is applied: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/commits/master?ref_type=HEADS For example: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/commit/4ea3acc000a793d04bae90eabfdc47be31580b87 - CONFIG_OF_LIST="starfive/jh7110-deepcomputing-fml13v01 starfive/jh7110-milkv-mars starfive/jh7110-milkv-marscm-emmc starfive/jh7110-milkv-marscm-lite starfive/jh7110-pine64-star64 starfive/jh7110-starfive-visionfive-2-v1.2a starfive/jh7110-starfive-visionfive-2-v1.3b" + CONFIG_OF_LIST="starfive/jh7110-deepcomputing-fml13v01 starfive/jh7110-milkv-mars starfive/jh7110-milkv-marscm-emmc starfive/jh7110-milkv-marscm-lite starfive/jh7110-pine64-star64 starfive/jh7110-starfive-visionfive-2-v1.2a starfive/jh7110-starfive-visionfive-2-v1.3b configs/starfive_visionfive2_defconfig" The above does not agree with what I reviewed on the mailing list. I am listed as having reviewed the content being applied. What was applied is something completely different than what I reviewed! My question: Why are changes to the series being made when applying to the tree, who is making those changes, and how can we get visibility into these mistakes? My question is valid even if the errors are not intentional or through action of some automated merge algorithm. This is a serious problem to associate contributors with code they did not write or review. -E
