So I think the vr(4) diff has had a reasonable amount of testing;
any objections or ideally OKs to commit it?
I have also tested sis(4) on a PC Engines WRAP now; despite the
DP83815 datasheet indicating that "Accept Long Packets"
(SIS_RXCFG_RX_JABBER) should permit frames up to 2046 it seems
something more is required for that; however setting mtu to 1518
does work. In the case of sis(4) there is no change to how the chip
is programmed at all, so this is a NOOP unless somebody deliberately
configures a larger MTU on the device. Therefore I believe that
this would be safe to allow without a big round of testing. OK?
Both diffs below.
(totally unrelated but I was interested to note that the source
code for the BIOS used on the WRAP is available for download).
Index: if_vr.c
===================================================================
RCS file: /cvs/src/sys/dev/pci/if_vr.c,v
retrieving revision 1.126
diff -u -p -r1.126 if_vr.c
--- if_vr.c 28 Jan 2013 02:57:02 -0000 1.126
+++ if_vr.c 9 Feb 2013 15:24:48 -0000
@@ -164,6 +164,7 @@ int vr_alloc_mbuf(struct vr_softc *, str
#define VR_Q_CAM (1<<2)
#define VR_Q_HWTAG (1<<3)
#define VR_Q_INTDISABLE (1<<4)
+#define VR_Q_BABYJUMBO (1<<5) /* others may work too */
struct vr_type {
pci_vendor_id_t vr_vid;
@@ -175,11 +176,12 @@ struct vr_type {
{ PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_RHINEII,
VR_Q_NEEDALIGN },
{ PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_RHINEII_2,
- 0 },
+ VR_Q_BABYJUMBO },
{ PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT6105,
- 0 },
+ VR_Q_BABYJUMBO },
{ PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT6105M,
- VR_Q_CSUM | VR_Q_CAM | VR_Q_HWTAG | VR_Q_INTDISABLE },
+ VR_Q_CSUM | VR_Q_CAM | VR_Q_HWTAG | VR_Q_INTDISABLE |
+ VR_Q_BABYJUMBO },
{ PCI_VENDOR_DELTA, PCI_PRODUCT_DELTA_RHINEII,
VR_Q_NEEDALIGN },
{ PCI_VENDOR_ADDTRON, PCI_PRODUCT_ADDTRON_RHINEII,
@@ -630,6 +632,9 @@ vr_attach(struct device *parent, struct
ifp->if_ioctl = vr_ioctl;
ifp->if_start = vr_start;
ifp->if_watchdog = vr_watchdog;
+ if (sc->vr_quirks & VR_Q_BABYJUMBO)
+ ifp->if_hardmtu = VR_RXLEN_BABYJUMBO -
+ ETHER_HDR_LEN - ETHER_CRC_LEN;
IFQ_SET_READY(&ifp->if_snd);
bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
@@ -1745,7 +1750,10 @@ vr_alloc_mbuf(struct vr_softc *sc, struc
r->vr_mbuf = m;
d = r->vr_ptr;
d->vr_data = htole32(r->vr_map->dm_segs[0].ds_addr);
- d->vr_ctl = htole32(VR_RXCTL | VR_RXLEN);
+ if (sc->vr_quirks & VR_Q_BABYJUMBO)
+ d->vr_ctl = htole32(VR_RXCTL | VR_RXLEN_BABYJUMBO);
+ else
+ d->vr_ctl = htole32(VR_RXCTL | VR_RXLEN);
bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap.vrm_map, 0,
sc->sc_listmap.vrm_map->dm_mapsize, BUS_DMASYNC_PREWRITE);
Index: if_vrreg.h
===================================================================
RCS file: /cvs/src/sys/dev/pci/if_vrreg.h,v
retrieving revision 1.34
diff -u -p -r1.34 if_vrreg.h
--- if_vrreg.h 28 Jan 2013 02:57:02 -0000 1.34
+++ if_vrreg.h 9 Feb 2013 15:24:48 -0000
@@ -437,6 +437,8 @@ struct vr_desc {
#define VR_TX_LIST_CNT 128
#define VR_MIN_FRAMELEN 60
#define VR_RXLEN 1524
+/* determined experimentally; seems intermittent with higher values */
+#define VR_RXLEN_BABYJUMBO 1758
#define VR_TX_INTR_THRESH 8
struct vr_list_data {
Index: if_sis.c
===================================================================
RCS file: /cvs/src/sys/dev/pci/if_sis.c,v
retrieving revision 1.107
diff -u -p -r1.107 if_sis.c
--- if_sis.c 29 Nov 2012 21:10:32 -0000 1.107
+++ if_sis.c 9 Feb 2013 15:21:16 -0000
@@ -1093,6 +1093,7 @@ sis_attach(struct device *parent, struct
IFQ_SET_MAXLEN(&ifp->if_snd, SIS_TX_LIST_CNT - 1);
IFQ_SET_READY(&ifp->if_snd);
bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
+ ifp->if_hardmtu = 1518; /* determined experimentally on DP83815 */
ifp->if_capabilities = IFCAP_VLAN_MTU;
On 2013/02/07 17:41, Stuart Henderson wrote:
> At least the following vr(4) devices can be configured to permit
> larger MTUs.
>
> vr0 at pci0 dev 18 function 0 "VIA RhineII-2" rev 0x51: irq 11, address
> 00:40:63:c0:5d:27
> vr1 at pci2 dev 0 function 0 "VIA VT6105M RhineIII" rev 0x96: irq 5, address
> 00:00:24:cd:72:30
>
> This is extremely useful as it permits carrying stacked vlans
> on Alix/net5501, and also permits carrying 1500 MTU packets within
> pppoe(4) using the RFC4638 support.
>
> As seems to be common for fast ethernet chips, the register to set
> the length is 11 bits. When tested, both these NICs performed
> stably with an MTU of 1748 (around 95Mb/s throughput on my test
> machine, dmesg below); with a slightly higher MTU things mostly
> still worked however throughput fluctuated; with a much higher
> MTU connections stalled.
>
> As I am unsure about the effects on the other ICs supported by
> this driver, and because the Rx length is programmed whether or not
> the mtu is actually raised, I have added a quirk so this is only
> attempted on the "newer" ICs. (in quotes because my RHINEII_2 is
> on a ~10 year old VIA EPIA board).
>
> Tests so far have included use of vlan/svlan and NFS.
>
> Any comments or additional test reports? (of course I am primarily
> interested in reports of any change to *existing* behaviour, tests
> of new support is a bonus but is less interesting). Any OKs even,
> or is it a bit close to release for this?
>
> (I also note that for sis(4) we programme the chip to permit 2046
> byte frames - the datasheet's description of SIS_RXCFG_RX_JABBER is
> "Accept Long Packets" - so we could increase permitted MTU there
> i.e. "ifp->if_hardmtu = 2046 - ETHER_HDR_LEN - ETHER_CRC_LEN",
> however I don't have test hardware handy at the moment).
>
>
> Index: if_vr.c
> ===================================================================
> RCS file: /cvs/src/sys/dev/pci/if_vr.c,v
> retrieving revision 1.126
> diff -u -p -r1.126 if_vr.c
> --- if_vr.c 28 Jan 2013 02:57:02 -0000 1.126
> +++ if_vr.c 7 Feb 2013 17:17:25 -0000
> @@ -164,6 +164,7 @@ int vr_alloc_mbuf(struct vr_softc *, str
> #define VR_Q_CAM (1<<2)
> #define VR_Q_HWTAG (1<<3)
> #define VR_Q_INTDISABLE (1<<4)
> +#define VR_Q_BABYJUMBO (1<<5) /* others may work too */
>
> struct vr_type {
> pci_vendor_id_t vr_vid;
> @@ -175,11 +176,12 @@ struct vr_type {
> { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_RHINEII,
> VR_Q_NEEDALIGN },
> { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_RHINEII_2,
> - 0 },
> + VR_Q_BABYJUMBO },
> { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT6105,
> - 0 },
> + VR_Q_BABYJUMBO },
> { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT6105M,
> - VR_Q_CSUM | VR_Q_CAM | VR_Q_HWTAG | VR_Q_INTDISABLE },
> + VR_Q_CSUM | VR_Q_CAM | VR_Q_HWTAG | VR_Q_INTDISABLE |
> + VR_Q_BABYJUMBO },
> { PCI_VENDOR_DELTA, PCI_PRODUCT_DELTA_RHINEII,
> VR_Q_NEEDALIGN },
> { PCI_VENDOR_ADDTRON, PCI_PRODUCT_ADDTRON_RHINEII,
> @@ -630,6 +632,9 @@ vr_attach(struct device *parent, struct
> ifp->if_ioctl = vr_ioctl;
> ifp->if_start = vr_start;
> ifp->if_watchdog = vr_watchdog;
> + if (sc->vr_quirks & VR_Q_BABYJUMBO)
> + ifp->if_hardmtu = VR_RXLEN_BABYJUMBO -
> + ETHER_HDR_LEN - ETHER_CRC_LEN;
> IFQ_SET_READY(&ifp->if_snd);
> bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
>
> @@ -1745,7 +1750,10 @@ vr_alloc_mbuf(struct vr_softc *sc, struc
> r->vr_mbuf = m;
> d = r->vr_ptr;
> d->vr_data = htole32(r->vr_map->dm_segs[0].ds_addr);
> - d->vr_ctl = htole32(VR_RXCTL | VR_RXLEN);
> + if (sc->vr_quirks & VR_Q_BABYJUMBO)
> + d->vr_ctl = htole32(VR_RXCTL | VR_RXLEN_BABYJUMBO);
> + else
> + d->vr_ctl = htole32(VR_RXCTL | VR_RXLEN);
>
> bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap.vrm_map, 0,
> sc->sc_listmap.vrm_map->dm_mapsize, BUS_DMASYNC_PREWRITE);
> Index: if_vrreg.h
> ===================================================================
> RCS file: /cvs/src/sys/dev/pci/if_vrreg.h,v
> retrieving revision 1.34
> diff -u -p -r1.34 if_vrreg.h
> --- if_vrreg.h 28 Jan 2013 02:57:02 -0000 1.34
> +++ if_vrreg.h 7 Feb 2013 17:17:25 -0000
> @@ -437,6 +437,8 @@ struct vr_desc {
> #define VR_TX_LIST_CNT 128
> #define VR_MIN_FRAMELEN 60
> #define VR_RXLEN 1524
> +/* determined experimentally; seems intermittent with higher values */
> +#define VR_RXLEN_BABYJUMBO 1758
> #define VR_TX_INTR_THRESH 8
>
> struct vr_list_data {
>
>
>
> OpenBSD 5.3-beta (GENERIC) #16: Thu Feb 7 16:54:44 GMT 2013
> st...@i386.spacehopper.org:/usr/src/sys/arch/i386/compile/GENERIC
> cpu0: VIA Samuel 2 ("CentaurHauls" 686-class) 534 MHz
> cpu0: FPU,DE,TSC,MSR,MTRR,PGE,MMX,3DNOW
> real mem = 796389376 (759MB)
> avail mem = 772386816 (736MB)
> mainbus0 at root
> bios0 at mainbus0: AT/286+ BIOS, date 03/18/02, BIOS32 rev. 0 @ 0xfb370,
> SMBIOS rev. 2.2 @ 0xf0800 (43 entries)
> bios0: vendor Award Software International, Inc. version "6.00 PG" date
> 03/18/2002
> bios0: VIA Technologies, Inc. VT8601
> apm0 at bios0: Power Management spec V1.2 (slowidle)
> acpi at bios0 function 0x0 not configured
> pcibios0 at bios0: rev 2.1 @ 0xf0000/0xdce4
> pcibios0: PCI IRQ Routing Table rev 1.0 @ 0xfdc70/112 (5 entries)
> pcibios0: PCI Exclusive IRQs: 5 10 11 12
> pcibios0: PCI Interrupt Router at 000:17:0 ("VIA VT8231 ISA" rev 0x00)
> pcibios0: PCI bus #2 is the last bus
> bios0: ROM list: 0xc0000/0xc000 0xcc000/0x9800
> cpu0 at mainbus0: (uniprocessor)
> pci0 at mainbus0 bus 0: configuration mode 1 (bios)
> pchb0 at pci0 dev 0 function 0 "VIA VT8601 PCI" rev 0x05
> viaagp0 at pchb0: v2
> agp0 at viaagp0: aperture at 0xd0000000, size 0x10000000
> ppb0 at pci0 dev 1 function 0 "VIA VT82C601 AGP" rev 0x00
> pci1 at ppb0 bus 1
> vga1 at pci1 dev 0 function 0 "Trident CyberBlade i1" rev 0x6a
> wsdisplay0 at vga1 mux 1: console (80x25, vt100 emulation)
> wsdisplay0: screen 1-5 added (80x25, vt100 emulation)
> pcib0 at pci0 dev 17 function 0 "VIA VT8231 ISA" rev 0x10
> pciide0 at pci0 dev 17 function 1 "VIA VT82C571 IDE" rev 0x06: ATA100,
> channel 0 configured to compatibility, channel 1 configured to compatibility
> wd0 at pciide0 channel 0 drive 0: <InnoDisk Corp. - EDC4000 1GB>
> wd0: 2-sector PIO, LBA, 999MB, 2047248 sectors
> wd0(pciide0:0:0): using PIO mode 4, Ultra-DMA mode 4
> pciide0: channel 1 disabled (no drives)
> uhci0 at pci0 dev 17 function 2 "VIA VT83C572 USB" rev 0x1e: irq 10
> uhci1 at pci0 dev 17 function 3 "VIA VT83C572 USB" rev 0x1e: irq 10
> viapm0 at pci0 dev 17 function 4 "VIA VT8231 PMG" rev 0x10: SMI
> iic0 at viapm0
> iic0: addr 0x20 06=80 0e=03 0f=05 10=20 13=05 14=21 15=04 1b=02 86=80 8e=03
> 8f=05 90=20 93=05 94=21 95=04 9b=02 words 00=0000 01=0000 02=0000 03=0000
> 04=0000 05=0080 06=8000 07=0000
> spdmem0 at iic0 addr 0x50: 256MB SDRAM non-parity PC133CL2
> spdmem1 at iic0 addr 0x51: 512MB SDRAM non-parity PC133CL2
> viapm0: 24-bit timer at 3579545Hz
> auvia0 at pci0 dev 17 function 5 "VIA VT82C686 AC97" rev 0x40: irq 12
> ac97: codec id 0x56494161 (VIA Technologies VT1612A)
> ac97: codec features headphone, 18 bit DAC, 18 bit ADC, KS Waves 3D
> audio0 at auvia0
> vr0 at pci0 dev 18 function 0 "VIA RhineII-2" rev 0x51: irq 11, address
> 00:40:63:c0:5d:27
> ukphy0 at vr0 phy 1: Generic IEEE 802.3u media interface, rev. 5: OUI
> 0x004063, model 0x0032
> ppb1 at pci0 dev 20 function 0 "TI PCI2250 PCI-PCI" rev 0x02
> pci2 at ppb1 bus 2
> vr1 at pci2 dev 0 function 0 "VIA VT6105M RhineIII" rev 0x96: irq 5, address
> 00:00:24:cd:72:30
> ukphy1 at vr1 phy 1: Generic IEEE 802.3u media interface, rev. 3: OUI
> 0x004063, model 0x0034
> vr2 at pci2 dev 1 function 0 "VIA VT6105M RhineIII" rev 0x96: irq 12, address
> 00:00:24:cd:72:31
> ukphy2 at vr2 phy 1: Generic IEEE 802.3u media interface, rev. 3: OUI
> 0x004063, model 0x0034
> vr3 at pci2 dev 2 function 0 "VIA VT6105M RhineIII" rev 0x96: irq 10, address
> 00:00:24:cd:72:32
> ukphy3 at vr3 phy 1: Generic IEEE 802.3u media interface, rev. 3: OUI
> 0x004063, model 0x0034
> vr4 at pci2 dev 3 function 0 "VIA VT6105M RhineIII" rev 0x96: irq 11, address
> 00:00:24:cd:72:33
> ukphy4 at vr4 phy 1: Generic IEEE 802.3u media interface, rev. 3: OUI
> 0x004063, model 0x0034
> isa0 at pcib0
> isadma0 at isa0
> com0 at isa0 port 0x3f8/8 irq 4: ns16550a, 16 byte fifo
> com0: console
> pckbc0 at isa0 port 0x60/5
> pckbd0 at pckbc0 (kbd slot)
> pckbc0: using irq 1 for kbd slot
> wskbd0 at pckbd0: console keyboard, using wsdisplay0
> pcppi0 at isa0 port 0x61
> spkr0 at pcppi0
> lpt0 at isa0 port 0x378/4 irq 7
> npx0 at isa0 port 0xf0/16: reported by CPUID; using exception 16
> usb0 at uhci0: USB revision 1.0
> uhub0 at usb0 "VIA UHCI root hub" rev 1.00/1.00 addr 1
> usb1 at uhci1: USB revision 1.0
> uhub1 at usb1 "VIA UHCI root hub" rev 1.00/1.00 addr 1
> mtrr: Pentium Pro MTRR support
> vscsi0 at root
> scsibus0 at vscsi0: 256 targets
> softraid0 at root
> scsibus1 at softraid0: 256 targets
> root on wd0a (d4dbc8b67776f0f1.a) swap on wd0b dump on wd0b
>
